提交 42e4126b 编写于 作者: J Jan Kiszka 提交者: Michael S. Tsirkin

pci: Common overflow prevention

Introduce pci_config_read/write_common helpers to prevent passing
accesses down the callback chain that go beyond the config space limits.
Adjust length assertions as they are no longer correct (cutting may
generate valid 3 byte accesses).
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
上级 85dde9a9
...@@ -1108,8 +1108,7 @@ uint32_t pci_default_read_config(PCIDevice *d, ...@@ -1108,8 +1108,7 @@ uint32_t pci_default_read_config(PCIDevice *d,
uint32_t address, int len) uint32_t address, int len)
{ {
uint32_t val = 0; uint32_t val = 0;
assert(len == 1 || len == 2 || len == 4);
len = MIN(len, pci_config_size(d) - address);
memcpy(&val, d->config + address, len); memcpy(&val, d->config + address, len);
return le32_to_cpu(val); return le32_to_cpu(val);
} }
...@@ -1117,9 +1116,8 @@ uint32_t pci_default_read_config(PCIDevice *d, ...@@ -1117,9 +1116,8 @@ uint32_t pci_default_read_config(PCIDevice *d,
void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
{ {
int i, was_irq_disabled = pci_irq_disabled(d); int i, was_irq_disabled = pci_irq_disabled(d);
uint32_t config_size = pci_config_size(d);
for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) { for (i = 0; i < l; val >>= 8, ++i) {
uint8_t wmask = d->wmask[addr + i]; uint8_t wmask = d->wmask[addr + i];
uint8_t w1cmask = d->w1cmask[addr + i]; uint8_t w1cmask = d->w1cmask[addr + i];
assert(!(wmask & w1cmask)); assert(!(wmask & w1cmask));
......
...@@ -47,17 +47,33 @@ static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr) ...@@ -47,17 +47,33 @@ static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr)
return pci_find_device(bus, bus_num, devfn); return pci_find_device(bus, bus_num, devfn);
} }
void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr,
uint32_t limit, uint32_t val, uint32_t len)
{
assert(len <= 4);
pci_dev->config_write(pci_dev, addr, val, MIN(len, limit - addr));
}
uint32_t pci_host_config_read_common(PCIDevice *pci_dev, uint32_t addr,
uint32_t limit, uint32_t len)
{
assert(len <= 4);
return pci_dev->config_read(pci_dev, addr, MIN(len, limit - addr));
}
void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len) void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len)
{ {
PCIDevice *pci_dev = pci_dev_find_by_addr(s, addr); PCIDevice *pci_dev = pci_dev_find_by_addr(s, addr);
uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1); uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1);
if (!pci_dev) if (!pci_dev) {
return; return;
}
PCI_DPRINTF("%s: %s: addr=%02" PRIx32 " val=%08" PRIx32 " len=%d\n", PCI_DPRINTF("%s: %s: addr=%02" PRIx32 " val=%08" PRIx32 " len=%d\n",
__func__, pci_dev->name, config_addr, val, len); __func__, pci_dev->name, config_addr, val, len);
pci_dev->config_write(pci_dev, config_addr, val, len); pci_host_config_write_common(pci_dev, config_addr, PCI_CONFIG_SPACE_SIZE,
val, len);
} }
uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len) uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len)
...@@ -66,12 +82,12 @@ uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len) ...@@ -66,12 +82,12 @@ uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len)
uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1); uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1);
uint32_t val; uint32_t val;
assert(len == 1 || len == 2 || len == 4);
if (!pci_dev) { if (!pci_dev) {
return ~0x0; return ~0x0;
} }
val = pci_dev->config_read(pci_dev, config_addr, len); val = pci_host_config_read_common(pci_dev, config_addr,
PCI_CONFIG_SPACE_SIZE, len);
PCI_DPRINTF("%s: %s: addr=%02"PRIx32" val=%08"PRIx32" len=%d\n", PCI_DPRINTF("%s: %s: addr=%02"PRIx32" val=%08"PRIx32" len=%d\n",
__func__, pci_dev->name, config_addr, val, len); __func__, pci_dev->name, config_addr, val, len);
......
...@@ -39,6 +39,12 @@ struct PCIHostState { ...@@ -39,6 +39,12 @@ struct PCIHostState {
PCIBus *bus; PCIBus *bus;
}; };
/* common internal helpers for PCI/PCIe hosts, cut off overflows */
void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr,
uint32_t limit, uint32_t val, uint32_t len);
uint32_t pci_host_config_read_common(PCIDevice *pci_dev, uint32_t addr,
uint32_t limit, uint32_t len);
void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len); void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len);
uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len); uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len);
......
...@@ -57,22 +57,22 @@ static void pcie_mmcfg_data_write(PCIBus *s, ...@@ -57,22 +57,22 @@ static void pcie_mmcfg_data_write(PCIBus *s,
{ {
PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr); PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr);
if (!pci_dev) if (!pci_dev) {
return; return;
}
pci_dev->config_write(pci_dev, pci_host_config_write_common(pci_dev, PCIE_MMCFG_CONFOFFSET(mmcfg_addr),
PCIE_MMCFG_CONFOFFSET(mmcfg_addr), val, len); pci_config_size(pci_dev), val, len);
} }
static uint32_t pcie_mmcfg_data_read(PCIBus *s, uint32_t addr, int len) static uint32_t pcie_mmcfg_data_read(PCIBus *s, uint32_t addr, int len)
{ {
PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, addr); PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, addr);
assert(len == 1 || len == 2 || len == 4);
if (!pci_dev) { if (!pci_dev) {
return ~0x0; return ~0x0;
} }
return pci_dev->config_read(pci_dev, PCIE_MMCFG_CONFOFFSET(addr), len); return pci_host_config_read_common(pci_dev, PCIE_MMCFG_CONFOFFSET(addr),
pci_config_size(pci_dev), len);
} }
static void pcie_mmcfg_data_writeb(void *opaque, static void pcie_mmcfg_data_writeb(void *opaque,
......
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