Make CPU hflags be a masked version of the PowerPC MSR.

As a side effect, avoid potential bits shadowing in TB flags on 64 bits BookE.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3199 c046a42c-6fe2-441c-8c8c-71466251a162

target-ppc/cpu.h

@@ -807,7 +807,7 @@ struct CPUPPCState {
     /* Those resources are used only in Qemu core */
     jmp_buf jmp_env;
     int user_mode_only; /* user mode only simulation */
-    uint32_t hflags;
+    target_ulong hflags; /* hflags is a MSR & HFLAGS_MASK */
 
     /* Power management */
     int power_mode;

target-ppc/helper.c

@@ -1776,13 +1776,14 @@ void ppc_store_msr_32 (CPUPPCState *env, uint32_t value)
 void do_compute_hflags (CPUPPCState *env)
 {
     /* Compute current hflags */
-    env->hflags = (msr_cm << MSR_CM) | (msr_vr << MSR_VR) |
+    env->hflags = (msr_vr << MSR_VR) |
         (msr_ap << MSR_AP) | (msr_sa << MSR_SA) | (msr_pr << MSR_PR) |
         (msr_fp << MSR_FP) | (msr_fe0 << MSR_FE0) | (msr_se << MSR_SE) |
         (msr_be << MSR_BE) | (msr_fe1 << MSR_FE1) | (msr_le << MSR_LE);
 #if defined (TARGET_PPC64)
-    /* No care here: PowerPC 64 MSR_SF means the same as MSR_CM for BookE */
-    env->hflags |= (msr_sf << (MSR_SF - 32)) | (msr_hv << (MSR_HV - 32));
+    env->hflags |= msr_cm << MSR_CM;
+    env->hflags |= (uint64_t)msr_sf << MSR_SF;
+    env->hflags |= (uint64_t)msr_hv << MSR_HV;
 #endif
 }