diff --git a/target-cris/helper.c b/target-cris/helper.c
index 240bda056a49274929c875efb2f88f10171f7946..19c37558163a08b00affbe1d3b7204e748933f2d 100644
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -248,9 +248,26 @@ void do_interrupt(CPUState *env)
 target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
 {
 	uint32_t phy = addr;
+	uint32_t r_cause, r_tlb_sel, rand_lfsr;
 	struct cris_mmu_result res;
 	int miss;
+
+	/* Save MMU state.  */
+	r_tlb_sel = env->sregs[SFR_RW_MM_TLB_SEL];
+	r_cause = env->sregs[SFR_R_MM_CAUSE];
+	rand_lfsr = env->mmu_rand_lfsr;
+
 	miss = cris_mmu_translate(&res, env, addr, 0, 0);
+	/* If D TLB misses, try I TLB.  */
+	if (miss) {
+		miss = cris_mmu_translate(&res, env, addr, 2, 0);
+	}
+
+	/* Restore MMU state.  */
+	env->sregs[SFR_RW_MM_TLB_SEL] = r_tlb_sel;
+	env->sregs[SFR_R_MM_CAUSE] = r_cause;
+	env->mmu_rand_lfsr = rand_lfsr;
+
 	if (!miss)
 		phy = res.phy;
 	D(fprintf(stderr, "%s %x -> %x\n", __func__, addr, phy));