diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 155f5a8182ff5e72d7746f76c228a4a0e8892557..97431b1e62ec0c40ab97452d76948f4aee6ce6a1 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -160,7 +160,7 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr) default: #if 0 - printf ("malta_fpga_read: Bad register offset 0x" TLSZ "\n", + printf ("malta_fpga_read: Bad register offset 0x" TARGET_FMT_lx "\n", addr); #endif break; @@ -244,7 +244,7 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr, default: #if 0 - printf ("malta_fpga_write: Bad register offset 0x" TLSZ "\n", + printf ("malta_fpga_write: Bad register offset 0x" TARGET_FMT_lx "\n", addr); #endif break; @@ -464,7 +464,7 @@ static int64_t load_kernel (CPUState *env) /* Store command line. */ prom_set(index++, env->kernel_filename); if (initrd_size > 0) - prom_set(index++, "rd_start=0x" TLSZ " rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline); + prom_set(index++, "rd_start=0x" TARGET_FMT_lx " rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline); else prom_set(index++, env->kernel_cmdline); diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index 7d3ddd934b8a9d20a98a744791f3cbc92c687e28..63ad36720737d8c3fe09c2cb819ca886e02ddd17 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -103,7 +103,7 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename, if (initrd_size > 0) { int ret; ret = sprintf(phys_ram_base + (16 << 20) - 256, - "rd_start=0x" TLSZ " rd_size=%li ", + "rd_start=0x" TARGET_FMT_lx " rd_size=%li ", INITRD_LOAD_ADDR, initrd_size); strcpy (phys_ram_base + (16 << 20) - 256 + ret, kernel_cmdline); diff --git a/target-mips/cpu.h b/target-mips/cpu.h index fb5a3fef3d78db3770689dcb290ebfd9d0394247..6068813dc6a6cb31d6ddf219edf3471eaddbc509 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -17,13 +17,6 @@ typedef unsigned char uint_fast8_t; typedef unsigned int uint_fast16_t; #endif -/* target_ulong size spec */ -#ifdef MIPS_HAS_MIPS64 -#define TLSZ "%016llx" -#else -#define TLSZ "%08x" -#endif - typedef union fpr_t fpr_t; union fpr_t { float64 fd; /* ieee double precision */ diff --git a/target-mips/helper.c b/target-mips/helper.c index 51b8ca102ca994851a2c3b229f463e3981dfd0b7..9ba401785beafba526a8a462efa0c538bbe5cd7d 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -132,7 +132,7 @@ static int get_physical_address (CPUState *env, target_ulong *physical, } #if 0 if (logfile) { - fprintf(logfile, TLSZ " %d %d => " TLSZ " %d (%d)\n", + fprintf(logfile, TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n", address, rw, access_type, *physical, *prot, ret); } #endif @@ -174,7 +174,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, #if 0 cpu_dump_state(env, logfile, fprintf, 0); #endif - fprintf(logfile, "%s pc " TLSZ " ad " TLSZ " rw %d is_user %d smmu %d\n", + fprintf(logfile, "%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d is_user %d smmu %d\n", __func__, env->PC, address, rw, is_user, is_softmmu); } @@ -192,7 +192,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, ret = get_physical_address(env, &physical, &prot, address, rw, access_type); if (logfile) { - fprintf(logfile, "%s address=" TLSZ " ret %d physical " TLSZ " prot %d\n", + fprintf(logfile, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_lx " prot %d\n", __func__, address, ret, physical, prot); } if (ret == TLBRET_MATCH) { @@ -258,7 +258,7 @@ void do_interrupt (CPUState *env) int cause = -1; if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) { - fprintf(logfile, "%s enter: PC " TLSZ " EPC " TLSZ " cause %d excp %d\n", + fprintf(logfile, "%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d excp %d\n", __func__, env->PC, env->CP0_EPC, cause, env->exception_index); } if (env->exception_index == EXCP_EXT_INTERRUPT && @@ -410,8 +410,8 @@ void do_interrupt (CPUState *env) exit(1); } if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) { - fprintf(logfile, "%s: PC " TLSZ " EPC " TLSZ " cause %d excp %d\n" - " S %08x C %08x A " TLSZ " D " TLSZ "\n", + fprintf(logfile, "%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d excp %d\n" + " S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n", __func__, env->PC, env->CP0_EPC, cause, env->exception_index, env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr, env->CP0_DEPC); diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 1b8d9351a966139728e7c14f3bfdd8a51a3dce06..2e2df38a243dc1cad8c81053d31fd1b3569a4034 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -492,13 +492,13 @@ void do_tlbr (void) void dump_ldst (const unsigned char *func) { if (loglevel) - fprintf(logfile, "%s => " TLSZ " " TLSZ "\n", __func__, T0, T1); + fprintf(logfile, "%s => " TARGET_FMT_lx " " TARGET_FMT_lx "\n", __func__, T0, T1); } void dump_sc (void) { if (loglevel) { - fprintf(logfile, "%s " TLSZ " at " TLSZ " (" TLSZ ")\n", __func__, + fprintf(logfile, "%s " TARGET_FMT_lx " at " TARGET_FMT_lx " (" TARGET_FMT_lx ")\n", __func__, T1, T0, env->CP0_LLAddr); } } @@ -506,7 +506,7 @@ void dump_sc (void) void debug_eret (void) { if (loglevel) { - fprintf(logfile, "ERET: pc " TLSZ " EPC " TLSZ " ErrorEPC " TLSZ " (%d)\n", + fprintf(logfile, "ERET: pc " TARGET_FMT_lx " EPC " TARGET_FMT_lx " ErrorEPC " TARGET_FMT_lx " (%d)\n", env->PC, env->CP0_EPC, env->CP0_ErrorEPC, env->hflags & MIPS_HFLAG_ERL ? 1 : 0); } diff --git a/target-mips/op_helper_mem.c b/target-mips/op_helper_mem.c index 6af78ce057c9e9947020910924ef1329c8314bbb..e0030e08517a912fc3050273695d9bfc4c752b03 100644 --- a/target-mips/op_helper_mem.c +++ b/target-mips/op_helper_mem.c @@ -28,7 +28,7 @@ void glue(do_lwl, MEMSUFFIX) (uint32_t tmp) } #if defined (DEBUG_OP) if (logfile) { - fprintf(logfile, "%s: " TLSZ " - %08x " TLSZ " => " TLSZ "\n", + fprintf(logfile, "%s: " TARGET_FMT_lx " - %08x " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", __func__, sav, tmp, T1, T0); } #endif @@ -57,7 +57,7 @@ void glue(do_lwr, MEMSUFFIX) (uint32_t tmp) } #if defined (DEBUG_OP) if (logfile) { - fprintf(logfile, "%s: " TLSZ " - %08x " TLSZ " => " TLSZ "\n", + fprintf(logfile, "%s: " TARGET_FMT_lx " - %08x " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", __func__, sav, tmp, T1, T0); } #endif @@ -86,7 +86,7 @@ uint32_t glue(do_swl, MEMSUFFIX) (uint32_t tmp) } #if defined (DEBUG_OP) if (logfile) { - fprintf(logfile, "%s: " TLSZ " - " TLSZ " " TLSZ " => %08x\n", + fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => %08x\n", __func__, T0, sav, T1, tmp); } #endif @@ -116,7 +116,7 @@ uint32_t glue(do_swr, MEMSUFFIX) (uint32_t tmp) } #if defined (DEBUG_OP) if (logfile) { - fprintf(logfile, "%s: " TLSZ " - " TLSZ " " TLSZ " => %08x\n", + fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => %08x\n", __func__, T0, sav, T1, tmp); } #endif @@ -166,7 +166,7 @@ void glue(do_ldl, MEMSUFFIX) (uint64_t tmp) } #if defined (DEBUG_OP) if (logfile) { - fprintf(logfile, "%s: " TLSZ " - " TLSZ " " TLSZ " => " TLSZ "\n", + fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", __func__, sav, tmp, T1, T0); } #endif @@ -207,7 +207,7 @@ void glue(do_ldr, MEMSUFFIX) (uint64_t tmp) } #if defined (DEBUG_OP) if (logfile) { - fprintf(logfile, "%s: " TLSZ " - " TLSZ " " TLSZ " => " TLSZ "\n", + fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", __func__, sav, tmp, T1, T0); } #endif @@ -248,7 +248,7 @@ uint64_t glue(do_sdl, MEMSUFFIX) (uint64_t tmp) } #if defined (DEBUG_OP) if (logfile) { - fprintf(logfile, "%s: " TLSZ " - " TLSZ " " TLSZ " => " TLSZ "\n", + fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", __func__, T0, sav, T1, tmp); } #endif @@ -290,7 +290,7 @@ uint64_t glue(do_sdr, MEMSUFFIX) (uint64_t tmp) } #if defined (DEBUG_OP) if (logfile) { - fprintf(logfile, "%s: " TLSZ " - " TLSZ " " TLSZ " => " TLSZ "\n", + fprintf(logfile, "%s: " TARGET_FMT_lx " - " TARGET_FMT_lx " " TARGET_FMT_lx " => " TARGET_FMT_lx "\n", __func__, T0, sav, T1, tmp); } #endif diff --git a/target-mips/translate.c b/target-mips/translate.c index ce56bb083453052e65939bbc053c4274a53437e1..c049ad6e81b548c422d65408c2900613be0ce2f8 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -503,7 +503,7 @@ enum { #define MIPS_DEBUG(fmt, args...) \ do { \ if (loglevel & CPU_LOG_TB_IN_ASM) { \ - fprintf(logfile, TLSZ ": %08x " fmt "\n", \ + fprintf(logfile, TARGET_FMT_lx ": %08x " fmt "\n", \ ctx->pc, ctx->opcode , ##args); \ } \ } while (0) @@ -4124,21 +4124,21 @@ static void gen_compute_branch1 (DisasContext *ctx, uint32_t op, switch (op) { case OPC_BC1F: gen_op_bc1f(); - MIPS_DEBUG("bc1f " TLSZ, btarget); + MIPS_DEBUG("bc1f " TARGET_FMT_lx, btarget); goto not_likely; case OPC_BC1FL: gen_op_bc1f(); - MIPS_DEBUG("bc1fl " TLSZ, btarget); + MIPS_DEBUG("bc1fl " TARGET_FMT_lx, btarget); goto likely; case OPC_BC1T: gen_op_bc1t(); - MIPS_DEBUG("bc1t " TLSZ, btarget); + MIPS_DEBUG("bc1t " TARGET_FMT_lx, btarget); not_likely: ctx->hflags |= MIPS_HFLAG_BC; break; case OPC_BC1TL: gen_op_bc1t(); - MIPS_DEBUG("bc1tl " TLSZ, btarget); + MIPS_DEBUG("bc1tl " TARGET_FMT_lx, btarget); likely: ctx->hflags |= MIPS_HFLAG_BL; break; @@ -4149,7 +4149,7 @@ static void gen_compute_branch1 (DisasContext *ctx, uint32_t op, } gen_op_set_bcond(); - MIPS_DEBUG("enter ds: cond %02x target " TLSZ, + MIPS_DEBUG("enter ds: cond %02x target " TARGET_FMT_lx, ctx->hflags, btarget); ctx->btarget = btarget; @@ -4583,7 +4583,7 @@ static void decode_opc (DisasContext *ctx) if ((ctx->hflags & MIPS_HFLAG_BMASK) == MIPS_HFLAG_BL) { /* Handle blikely not taken case */ - MIPS_DEBUG("blikely condition (" TLSZ ")", ctx->pc + 4); + MIPS_DEBUG("blikely condition (" TARGET_FMT_lx ")", ctx->pc + 4); gen_blikely(ctx); } op = MASK_OP_MAJOR(ctx->opcode); @@ -5191,7 +5191,7 @@ void fpu_dump_state(CPUState *env, FILE *f, void dump_fpu (CPUState *env) { if (loglevel) { - fprintf(logfile, "pc=0x" TLSZ " HI=0x" TLSZ " LO=0x" TLSZ " ds %04x " TLSZ " %d\n", + fprintf(logfile, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n", env->PC, env->HI, env->LO, env->hflags, env->btarget, env->bcond); fpu_dump_state(env, logfile, fprintf, 0); } @@ -5212,23 +5212,23 @@ void cpu_mips_check_sign_extensions (CPUState *env, FILE *f, int i; if (!SIGN_EXT_P(env->PC)) - cpu_fprintf(f, "BROKEN: pc=0x" TLSZ "\n", env->PC); + cpu_fprintf(f, "BROKEN: pc=0x" TARGET_FMT_lx "\n", env->PC); if (!SIGN_EXT_P(env->HI)) - cpu_fprintf(f, "BROKEN: HI=0x" TLSZ "\n", env->HI); + cpu_fprintf(f, "BROKEN: HI=0x" TARGET_FMT_lx "\n", env->HI); if (!SIGN_EXT_P(env->LO)) - cpu_fprintf(f, "BROKEN: LO=0x" TLSZ "\n", env->LO); + cpu_fprintf(f, "BROKEN: LO=0x" TARGET_FMT_lx "\n", env->LO); if (!SIGN_EXT_P(env->btarget)) - cpu_fprintf(f, "BROKEN: btarget=0x" TLSZ "\n", env->btarget); + cpu_fprintf(f, "BROKEN: btarget=0x" TARGET_FMT_lx "\n", env->btarget); for (i = 0; i < 32; i++) { if (!SIGN_EXT_P(env->gpr[i])) - cpu_fprintf(f, "BROKEN: %s=0x" TLSZ "\n", regnames[i], env->gpr[i]); + cpu_fprintf(f, "BROKEN: %s=0x" TARGET_FMT_lx "\n", regnames[i], env->gpr[i]); } if (!SIGN_EXT_P(env->CP0_EPC)) - cpu_fprintf(f, "BROKEN: EPC=0x" TLSZ "\n", env->CP0_EPC); + cpu_fprintf(f, "BROKEN: EPC=0x" TARGET_FMT_lx "\n", env->CP0_EPC); if (!SIGN_EXT_P(env->CP0_LLAddr)) - cpu_fprintf(f, "BROKEN: LLAddr=0x" TLSZ "\n", env->CP0_LLAddr); + cpu_fprintf(f, "BROKEN: LLAddr=0x" TARGET_FMT_lx "\n", env->CP0_LLAddr); } #endif @@ -5239,12 +5239,12 @@ void cpu_dump_state (CPUState *env, FILE *f, uint32_t c0_status; int i; - cpu_fprintf(f, "pc=0x" TLSZ " HI=0x" TLSZ " LO=0x" TLSZ " ds %04x " TLSZ " %d\n", + cpu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n", env->PC, env->HI, env->LO, env->hflags, env->btarget, env->bcond); for (i = 0; i < 32; i++) { if ((i & 3) == 0) cpu_fprintf(f, "GPR%02d:", i); - cpu_fprintf(f, " %s " TLSZ, regnames[i], env->gpr[i]); + cpu_fprintf(f, " %s " TARGET_FMT_lx, regnames[i], env->gpr[i]); if ((i & 3) == 3) cpu_fprintf(f, "\n"); } @@ -5257,9 +5257,9 @@ void cpu_dump_state (CPUState *env, FILE *f, if (env->hflags & MIPS_HFLAG_EXL) c0_status |= (1 << CP0St_EXL); - cpu_fprintf(f, "CP0 Status 0x%08x Cause 0x%08x EPC 0x" TLSZ "\n", + cpu_fprintf(f, "CP0 Status 0x%08x Cause 0x%08x EPC 0x" TARGET_FMT_lx "\n", c0_status, env->CP0_Cause, env->CP0_EPC); - cpu_fprintf(f, " Config0 0x%08x Config1 0x%08x LLAddr 0x" TLSZ "\n", + cpu_fprintf(f, " Config0 0x%08x Config1 0x%08x LLAddr 0x" TARGET_FMT_lx "\n", env->CP0_Config0, env->CP0_Config1, env->CP0_LLAddr); #ifdef MIPS_USES_FPU if (c0_status & (1 << CP0St_CU1))