diff --git a/hw/i8259.c b/hw/i8259.c index f8b5a984b54c2641d1abff8b854e0770e404fc96..631e4113bced4e40af77cca45fe5467a47df29ba 100644 --- a/hw/i8259.c +++ b/hw/i8259.c @@ -44,6 +44,7 @@ typedef struct PicState { uint8_t rotate_on_auto_eoi; uint8_t special_fully_nested_mode; uint8_t init4; /* true if 4 byte init */ + uint8_t single_mode; /* true if slave pic is not initialized */ uint8_t elcr; /* PIIX edge/trigger selection*/ uint8_t elcr_mask; PicState2 *pics_state; @@ -278,6 +279,7 @@ static void pic_reset(void *opaque) s->rotate_on_auto_eoi = 0; s->special_fully_nested_mode = 0; s->init4 = 0; + s->single_mode = 0; /* Note: ELCR is not reset */ } @@ -298,8 +300,7 @@ static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val) s->pics_state->irq_request(s->pics_state->irq_request_opaque, 0); s->init_state = 1; s->init4 = val & 1; - if (val & 0x02) - hw_error("single mode not supported"); + s->single_mode = val & 2; if (val & 0x08) hw_error("level sensitive irq not supported"); } else if (val & 0x08) { @@ -356,7 +357,7 @@ static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val) break; case 1: s->irq_base = val & 0xf8; - s->init_state = 2; + s->init_state = s->single_mode && s->init4 ? 3 : 2; break; case 2: if (s->init4) { @@ -468,6 +469,7 @@ static void pic_save(QEMUFile *f, void *opaque) qemu_put_8s(f, &s->rotate_on_auto_eoi); qemu_put_8s(f, &s->special_fully_nested_mode); qemu_put_8s(f, &s->init4); + qemu_put_8s(f, &s->single_mode); qemu_put_8s(f, &s->elcr); } @@ -492,6 +494,7 @@ static int pic_load(QEMUFile *f, void *opaque, int version_id) qemu_get_8s(f, &s->rotate_on_auto_eoi); qemu_get_8s(f, &s->special_fully_nested_mode); qemu_get_8s(f, &s->init4); + qemu_get_8s(f, &s->single_mode); qemu_get_8s(f, &s->elcr); return 0; }