diff --git a/target-mips/cpu.h b/target-mips/cpu.h index a08a634bcbd38b7058e1ddc3d2434bc4be5b9669..2ca2b643b49cd122029f6c5ef56bc38cb20edf22 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -523,40 +523,37 @@ enum { EXCP_SRESET, EXCP_DSS, EXCP_DINT, + EXCP_DDBL, + EXCP_DDBS, EXCP_NMI, EXCP_MCHECK, - EXCP_EXT_INTERRUPT, + EXCP_EXT_INTERRUPT, /* 8 */ EXCP_DFWATCH, - EXCP_DIB, /* 8 */ + EXCP_DIB, EXCP_IWATCH, EXCP_AdEL, EXCP_AdES, EXCP_TLBF, EXCP_IBE, - EXCP_DBp, + EXCP_DBp, /* 16 */ EXCP_SYSCALL, - EXCP_BREAK, /* 16 */ + EXCP_BREAK, EXCP_CpU, EXCP_RI, EXCP_OVERFLOW, EXCP_TRAP, EXCP_FPE, - EXCP_DDBS, - EXCP_DWATCH, - EXCP_LAE, /* 24 */ - EXCP_SAE, + EXCP_DWATCH, /* 24 */ EXCP_LTLBL, EXCP_TLBL, EXCP_TLBS, EXCP_DBE, - EXCP_DDBL, EXCP_THREAD, - EXCP_MTCP0 = 0x104, /* mtmsr instruction: */ - /* may change privilege level */ - EXCP_BRANCH = 0x108, /* branch instruction */ - EXCP_ERET = 0x10C, /* return from interrupt */ - EXCP_SYSCALL_USER = 0x110, /* System call in user mode only */ - EXCP_FLUSH = 0x109, + EXCP_MDMX, + EXCP_C2E, + EXCP_CACHE, /* 32 */ + + EXCP_LAST = EXCP_CACHE, }; int cpu_mips_exec(CPUMIPSState *s); diff --git a/target-mips/helper.c b/target-mips/helper.c index 3151e0ae96cbc4d64626a92ce854211a60b06935..a7252a07bc98b69eb2ad1dc9864f777795f70728 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -318,20 +318,62 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, return ret; } -#if defined(CONFIG_USER_ONLY) -void do_interrupt (CPUState *env) -{ - env->exception_index = EXCP_NONE; -} -#else +#if !defined(CONFIG_USER_ONLY) +static struct _excp_names { + int excp; + char *name; +} excp_names[EXCP_LAST + 1] = { + { EXCP_RESET, "reset" }, + { EXCP_SRESET, "soft reset" }, + { EXCP_DSS, "debug single step" }, + { EXCP_DINT, "debug interrupt" }, + { EXCP_NMI, "non-maskable interrupt" }, + { EXCP_MCHECK, "machine check" }, + { EXCP_EXT_INTERRUPT, "interrupt" }, + { EXCP_DFWATCH, "deferred watchpoint" }, + { EXCP_DIB, "debug instruction breakpoint" }, + { EXCP_IWATCH, "instruction fetch watchpoint" }, + { EXCP_AdEL, "address error load" }, + { EXCP_AdES, "address error store" }, + { EXCP_TLBF, "TLB refill" }, + { EXCP_IBE, "instruction bus error" }, + { EXCP_DBp, "debug breakpoint" }, + { EXCP_SYSCALL, "syscall" }, + { EXCP_BREAK, "break" }, + { EXCP_CpU, "coprocessor unusable" }, + { EXCP_RI, "reserved instruction" }, + { EXCP_OVERFLOW, "arithmetic overflow" }, + { EXCP_TRAP, "trap" }, + { EXCP_FPE, "floating point" }, + { EXCP_DDBS, "debug data break store" }, + { EXCP_DWATCH, "data watchpoint" }, + { EXCP_LTLBL, "TLB modify" }, + { EXCP_TLBL, "TLB load" }, + { EXCP_TLBS, "TLB store" }, + { EXCP_DBE, "data bus error" }, + { EXCP_DDBL, "debug data break load" }, + { EXCP_THREAD, "thread" }, + { EXCP_MDMX, "MDMX" }, + { EXCP_C2E, "precise coprocessor 2" }, + { EXCP_CACHE, "cache error" }, +}; +#endif + void do_interrupt (CPUState *env) { +#if !defined(CONFIG_USER_ONLY) target_ulong offset; int cause = -1; + char *name; if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) { - fprintf(logfile, "%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d excp %d\n", - __func__, env->PC[env->current_tc], env->CP0_EPC, cause, env->exception_index); + if (env->exception_index < 0 || env->exception_index > EXCP_LAST) + name = "unknown"; + else + name = excp_names[env->exception_index].name; + + fprintf(logfile, "%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n", + __func__, env->PC[env->current_tc], env->CP0_EPC, name); } if (env->exception_index == EXCP_EXT_INTERRUPT && (env->hflags & MIPS_HFLAG_DM)) @@ -520,15 +562,15 @@ void do_interrupt (CPUState *env) exit(1); } if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) { - fprintf(logfile, "%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d excp %d\n" + fprintf(logfile, "%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n" " S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n", - __func__, env->PC[env->current_tc], env->CP0_EPC, cause, env->exception_index, + __func__, env->PC[env->current_tc], env->CP0_EPC, cause, env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr, env->CP0_DEPC); } +#endif /* !defined(CONFIG_USER_ONLY) */ env->exception_index = EXCP_NONE; } -#endif /* !defined(CONFIG_USER_ONLY) */ void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra) {