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提交 0fa85d43 编写于 作者: B bellard
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64 bit target support 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1195 c046a42c-6fe2-441c-8c8c-71466251a162
上级 b4ff5987
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Showing with 84 addition and 66 deletion
target-arm/translate.c
浏览文件 @ 0fa85d43
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
/* internal defines */ /* internal defines */
typedef struct DisasContext { typedef struct DisasContext {
uint8_t *pc; target_ulong pc;
int is_jmp; int is_jmp;
struct TranslationBlock *tb; struct TranslationBlock *tb;
} DisasContext; } DisasContext;
...@@ -762,10 +762,10 @@ static inline int gen_intermediate_code_internal(CPUState *env, ...@@ -762,10 +762,10 @@ static inline int gen_intermediate_code_internal(CPUState *env,
DisasContext dc1, *dc = &dc1; DisasContext dc1, *dc = &dc1;
uint16_t *gen_opc_end; uint16_t *gen_opc_end;
int j, lj; int j, lj;
uint8_t *pc_start; target_ulong pc_start;
/* generate intermediate code */ /* generate intermediate code */
pc_start = (uint8_t *)tb->pc; pc_start = tb->pc;
dc->tb = tb; dc->tb = tb;
...@@ -784,7 +784,7 @@ static inline int gen_intermediate_code_internal(CPUState *env, ...@@ -784,7 +784,7 @@ static inline int gen_intermediate_code_internal(CPUState *env,
while (lj < j) while (lj < j)
gen_opc_instr_start[lj++] = 0; gen_opc_instr_start[lj++] = 0;
} }
gen_opc_pc[lj] = (uint32_t)dc->pc; gen_opc_pc[lj] = dc->pc;
gen_opc_instr_start[lj] = 1; gen_opc_instr_start[lj] = 1;
} }
disas_arm_insn(dc); disas_arm_insn(dc);
...@@ -811,7 +811,7 @@ static inline int gen_intermediate_code_internal(CPUState *env, ...@@ -811,7 +811,7 @@ static inline int gen_intermediate_code_internal(CPUState *env,
if (loglevel & CPU_LOG_TB_IN_ASM) { if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "----------------\n"); fprintf(logfile, "----------------\n");
fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
disas(logfile, pc_start, dc->pc - pc_start, 0, 0); target_disas(logfile, pc_start, dc->pc - pc_start, 0);
fprintf(logfile, "\n"); fprintf(logfile, "\n");
if (loglevel & (CPU_LOG_TB_OP)) { if (loglevel & (CPU_LOG_TB_OP)) {
fprintf(logfile, "OP:\n"); fprintf(logfile, "OP:\n");
......
target-ppc/exec.h
浏览文件 @ 0fa85d43
...@@ -173,4 +173,7 @@ static inline void regs_to_env(void) ...@@ -173,4 +173,7 @@ static inline void regs_to_env(void)
{ {
} }
int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
int is_user, int is_softmmu);
#endif /* !defined (__PPC_H__) */ #endif /* !defined (__PPC_H__) */
target-ppc/helper.c
浏览文件 @ 0fa85d43
...@@ -29,8 +29,6 @@ ...@@ -29,8 +29,6 @@
/*****************************************************************************/ /*****************************************************************************/
/* PPC MMU emulation */ /* PPC MMU emulation */
int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
int is_user, int is_softmmu);
/* Perform BAT hit & translation */ /* Perform BAT hit & translation */
static int get_bat (CPUState *env, uint32_t *real, int *prot, static int get_bat (CPUState *env, uint32_t *real, int *prot,
...@@ -421,7 +419,7 @@ target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr) ...@@ -421,7 +419,7 @@ target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
NULL, it means that the function was called in C code (i.e. not NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */ from generated code or from helper.c) */
/* XXX: fix it to restore all registers */ /* XXX: fix it to restore all registers */
void tlb_fill(unsigned long addr, int is_write, int is_user, void *retaddr) void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr)
{ {
TranslationBlock *tb; TranslationBlock *tb;
CPUState *saved_env; CPUState *saved_env;
...@@ -782,7 +780,7 @@ void do_interrupt (CPUState *env) ...@@ -782,7 +780,7 @@ void do_interrupt (CPUState *env)
/* Store exception cause */ /* Store exception cause */
/* Get rS/rD and rA from faulting opcode */ /* Get rS/rD and rA from faulting opcode */
env->spr[DSISR] |= env->spr[DSISR] |=
(ldl_code((void *)(env->nip - 4)) & 0x03FF0000) >> 16; (ldl_code((env->nip - 4)) & 0x03FF0000) >> 16;
/* data location address has been stored /* data location address has been stored
* when the fault has been detected * when the fault has been detected
*/ */
......
target-ppc/op_helper_mem.h
浏览文件 @ 0fa85d43
...@@ -8,14 +8,14 @@ void glue(do_lsw, MEMSUFFIX) (int dst) ...@@ -8,14 +8,14 @@ void glue(do_lsw, MEMSUFFIX) (int dst)
__func__, T0, T1, dst); __func__, T0, T1, dst);
} }
for (; T1 > 3; T1 -= 4, T0 += 4) { for (; T1 > 3; T1 -= 4, T0 += 4) {
ugpr(dst++) = glue(ldl, MEMSUFFIX)((void *)T0); ugpr(dst++) = glue(ldl, MEMSUFFIX)(T0);
if (dst == 32) if (dst == 32)
dst = 0; dst = 0;
} }
if (T1 > 0) { if (T1 > 0) {
tmp = 0; tmp = 0;
for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) { for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) {
tmp |= glue(ldub, MEMSUFFIX)((void *)T0) << sh; tmp |= glue(ldub, MEMSUFFIX)(T0) << sh;
} }
ugpr(dst) = tmp; ugpr(dst) = tmp;
} }
...@@ -30,13 +30,13 @@ void glue(do_stsw, MEMSUFFIX) (int src) ...@@ -30,13 +30,13 @@ void glue(do_stsw, MEMSUFFIX) (int src)
__func__, T0, T1, src); __func__, T0, T1, src);
} }
for (; T1 > 3; T1 -= 4, T0 += 4) { for (; T1 > 3; T1 -= 4, T0 += 4) {
glue(stl, MEMSUFFIX)((void *)T0, ugpr(src++)); glue(stl, MEMSUFFIX)(T0, ugpr(src++));
if (src == 32) if (src == 32)
src = 0; src = 0;
} }
if (T1 > 0) { if (T1 > 0) {
for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) for (sh = 24; T1 > 0; T1--, T0++, sh -= 8)
glue(stb, MEMSUFFIX)((void *)T0, (ugpr(src) >> sh) & 0xFF); glue(stb, MEMSUFFIX)(T0, (ugpr(src) >> sh) & 0xFF);
} }
} }
......
target-ppc/op_mem.h
浏览文件 @ 0fa85d43
...@@ -2,26 +2,26 @@ ...@@ -2,26 +2,26 @@
void glue(do_lsw, MEMSUFFIX) (int dst); void glue(do_lsw, MEMSUFFIX) (int dst);
void glue(do_stsw, MEMSUFFIX) (int src); void glue(do_stsw, MEMSUFFIX) (int src);
static inline uint16_t glue(ld16r, MEMSUFFIX) (void *EA) static inline uint16_t glue(ld16r, MEMSUFFIX) (target_ulong EA)
{ {
uint16_t tmp = glue(lduw, MEMSUFFIX)(EA); uint16_t tmp = glue(lduw, MEMSUFFIX)(EA);
return ((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8); return ((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8);
} }
static inline uint32_t glue(ld32r, MEMSUFFIX) (void *EA) static inline uint32_t glue(ld32r, MEMSUFFIX) (target_ulong EA)
{ {
uint32_t tmp = glue(ldl, MEMSUFFIX)(EA); uint32_t tmp = glue(ldl, MEMSUFFIX)(EA);
return ((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) | return ((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) |
((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24); ((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24);
} }
static inline void glue(st16r, MEMSUFFIX) (void *EA, uint16_t data) static inline void glue(st16r, MEMSUFFIX) (target_ulong EA, uint16_t data)
{ {
uint16_t tmp = ((data & 0xFF00) >> 8) | ((data & 0x00FF) << 8); uint16_t tmp = ((data & 0xFF00) >> 8) | ((data & 0x00FF) << 8);
glue(stw, MEMSUFFIX)(EA, tmp); glue(stw, MEMSUFFIX)(EA, tmp);
} }
static inline void glue(st32r, MEMSUFFIX) (void *EA, uint32_t data) static inline void glue(st32r, MEMSUFFIX) (target_ulong EA, uint32_t data)
{ {
uint32_t tmp = ((data & 0xFF000000) >> 24) | ((data & 0x00FF0000) >> 8) | uint32_t tmp = ((data & 0xFF000000) >> 24) | ((data & 0x00FF0000) >> 8) |
((data & 0x0000FF00) << 8) | ((data & 0x000000FF) << 24); ((data & 0x0000FF00) << 8) | ((data & 0x000000FF) << 24);
...@@ -32,14 +32,14 @@ static inline void glue(st32r, MEMSUFFIX) (void *EA, uint32_t data) ...@@ -32,14 +32,14 @@ static inline void glue(st32r, MEMSUFFIX) (void *EA, uint32_t data)
#define PPC_LD_OP(name, op) \ #define PPC_LD_OP(name, op) \
PPC_OP(glue(glue(l, name), MEMSUFFIX)) \ PPC_OP(glue(glue(l, name), MEMSUFFIX)) \
{ \ { \
T1 = glue(op, MEMSUFFIX)((void *)T0); \ T1 = glue(op, MEMSUFFIX)(T0); \
RETURN(); \ RETURN(); \
} }
#define PPC_ST_OP(name, op) \ #define PPC_ST_OP(name, op) \
PPC_OP(glue(glue(st, name), MEMSUFFIX)) \ PPC_OP(glue(glue(st, name), MEMSUFFIX)) \
{ \ { \
glue(op, MEMSUFFIX)((void *)T0, T1); \ glue(op, MEMSUFFIX)(T0, T1); \
RETURN(); \ RETURN(); \
} }
...@@ -65,7 +65,7 @@ PPC_OP(glue(lmw, MEMSUFFIX)) ...@@ -65,7 +65,7 @@ PPC_OP(glue(lmw, MEMSUFFIX))
int dst = PARAM(1); int dst = PARAM(1);
for (; dst < 32; dst++, T0 += 4) { for (; dst < 32; dst++, T0 += 4) {
ugpr(dst) = glue(ldl, MEMSUFFIX)((void *)T0); ugpr(dst) = glue(ldl, MEMSUFFIX)(T0);
} }
RETURN(); RETURN();
} }
...@@ -75,7 +75,7 @@ PPC_OP(glue(stmw, MEMSUFFIX)) ...@@ -75,7 +75,7 @@ PPC_OP(glue(stmw, MEMSUFFIX))
int src = PARAM(1); int src = PARAM(1);
for (; src < 32; src++, T0 += 4) { for (; src < 32; src++, T0 += 4) {
glue(stl, MEMSUFFIX)((void *)T0, ugpr(src)); glue(stl, MEMSUFFIX)(T0, ugpr(src));
} }
RETURN(); RETURN();
} }
...@@ -115,7 +115,7 @@ PPC_OP(glue(stsw, MEMSUFFIX)) ...@@ -115,7 +115,7 @@ PPC_OP(glue(stsw, MEMSUFFIX))
#define PPC_STF_OP(name, op) \ #define PPC_STF_OP(name, op) \
PPC_OP(glue(glue(st, name), MEMSUFFIX)) \ PPC_OP(glue(glue(st, name), MEMSUFFIX)) \
{ \ { \
glue(op, MEMSUFFIX)((void *)T0, FT1); \ glue(op, MEMSUFFIX)(T0, FT1); \
RETURN(); \ RETURN(); \
} }
...@@ -126,7 +126,7 @@ PPC_STF_OP(fs, stfl); ...@@ -126,7 +126,7 @@ PPC_STF_OP(fs, stfl);
#define PPC_LDF_OP(name, op) \ #define PPC_LDF_OP(name, op) \
PPC_OP(glue(glue(l, name), MEMSUFFIX)) \ PPC_OP(glue(glue(l, name), MEMSUFFIX)) \
{ \ { \
FT1 = glue(op, MEMSUFFIX)((void *)T0); \ FT1 = glue(op, MEMSUFFIX)(T0); \
RETURN(); \ RETURN(); \
} }
...@@ -139,7 +139,7 @@ PPC_OP(glue(lwarx, MEMSUFFIX)) ...@@ -139,7 +139,7 @@ PPC_OP(glue(lwarx, MEMSUFFIX))
if (T0 & 0x03) { if (T0 & 0x03) {
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
T1 = glue(ldl, MEMSUFFIX)((void *)T0); T1 = glue(ldl, MEMSUFFIX)(T0);
regs->reserve = T0; regs->reserve = T0;
} }
RETURN(); RETURN();
...@@ -154,7 +154,7 @@ PPC_OP(glue(stwcx, MEMSUFFIX)) ...@@ -154,7 +154,7 @@ PPC_OP(glue(stwcx, MEMSUFFIX))
if (regs->reserve != T0) { if (regs->reserve != T0) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(stl, MEMSUFFIX)((void *)T0, T1); glue(stl, MEMSUFFIX)(T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
...@@ -164,27 +164,27 @@ PPC_OP(glue(stwcx, MEMSUFFIX)) ...@@ -164,27 +164,27 @@ PPC_OP(glue(stwcx, MEMSUFFIX))
PPC_OP(glue(dcbz, MEMSUFFIX)) PPC_OP(glue(dcbz, MEMSUFFIX))
{ {
glue(stl, MEMSUFFIX)((void *)(T0 + 0x00), 0); glue(stl, MEMSUFFIX)(T0 + 0x00, 0);
glue(stl, MEMSUFFIX)((void *)(T0 + 0x04), 0); glue(stl, MEMSUFFIX)(T0 + 0x04, 0);
glue(stl, MEMSUFFIX)((void *)(T0 + 0x08), 0); glue(stl, MEMSUFFIX)(T0 + 0x08, 0);
glue(stl, MEMSUFFIX)((void *)(T0 + 0x0C), 0); glue(stl, MEMSUFFIX)(T0 + 0x0C, 0);
glue(stl, MEMSUFFIX)((void *)(T0 + 0x10), 0); glue(stl, MEMSUFFIX)(T0 + 0x10, 0);
glue(stl, MEMSUFFIX)((void *)(T0 + 0x14), 0); glue(stl, MEMSUFFIX)(T0 + 0x14, 0);
glue(stl, MEMSUFFIX)((void *)(T0 + 0x18), 0); glue(stl, MEMSUFFIX)(T0 + 0x18, 0);
glue(stl, MEMSUFFIX)((void *)(T0 + 0x1C), 0); glue(stl, MEMSUFFIX)(T0 + 0x1C, 0);
RETURN(); RETURN();
} }
/* External access */ /* External access */
PPC_OP(glue(eciwx, MEMSUFFIX)) PPC_OP(glue(eciwx, MEMSUFFIX))
{ {
T1 = glue(ldl, MEMSUFFIX)((void *)T0); T1 = glue(ldl, MEMSUFFIX)(T0);
RETURN(); RETURN();
} }
PPC_OP(glue(ecowx, MEMSUFFIX)) PPC_OP(glue(ecowx, MEMSUFFIX))
{ {
glue(stl, MEMSUFFIX)((void *)T0, T1); glue(stl, MEMSUFFIX)(T0, T1);
RETURN(); RETURN();
} }
......
target-ppc/translate.c
浏览文件 @ 0fa85d43
...@@ -131,7 +131,7 @@ static uint8_t spr_access[1024 / 2]; ...@@ -131,7 +131,7 @@ static uint8_t spr_access[1024 / 2];
/* internal defines */ /* internal defines */
typedef struct DisasContext { typedef struct DisasContext {
struct TranslationBlock *tb; struct TranslationBlock *tb;
uint32_t nip; target_ulong nip;
uint32_t opcode; uint32_t opcode;
uint32_t exception; uint32_t exception;
/* Execution mode */ /* Execution mode */
...@@ -3029,7 +3029,7 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, ...@@ -3029,7 +3029,7 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
{ {
DisasContext ctx, *ctxp = &ctx; DisasContext ctx, *ctxp = &ctx;
opc_handler_t **table, *handler; opc_handler_t **table, *handler;
uint32_t pc_start; target_ulong pc_start;
uint16_t *gen_opc_end; uint16_t *gen_opc_end;
int j, lj = -1; int j, lj = -1;
...@@ -3069,7 +3069,7 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, ...@@ -3069,7 +3069,7 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
ctx.nip, 1 - msr_pr, msr_ir); ctx.nip, 1 - msr_pr, msr_ir);
} }
#endif #endif
ctx.opcode = ldl_code((void *)ctx.nip); ctx.opcode = ldl_code(ctx.nip);
#if defined PPC_DEBUG_DISAS #if defined PPC_DEBUG_DISAS
if (loglevel & CPU_LOG_TB_IN_ASM) { if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "translate opcode %08x (%02x %02x %02x)\n", fprintf(logfile, "translate opcode %08x (%02x %02x %02x)\n",
...@@ -3174,8 +3174,8 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, ...@@ -3174,8 +3174,8 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
cpu_dump_state(env, logfile, fprintf, 0); cpu_dump_state(env, logfile, fprintf, 0);
} }
if (loglevel & CPU_LOG_TB_IN_ASM) { if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "IN: %s\n", lookup_symbol((void *)pc_start)); fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
disas(logfile, (void *)pc_start, ctx.nip - pc_start, 0, 0); target_disas(logfile, pc_start, ctx.nip - pc_start, 0);
fprintf(logfile, "\n"); fprintf(logfile, "\n");
} }
if (loglevel & CPU_LOG_TB_OP) { if (loglevel & CPU_LOG_TB_OP) {
......
target-sparc/helper.c
浏览文件 @ 0fa85d43
...@@ -62,7 +62,7 @@ void cpu_unlock(void) ...@@ -62,7 +62,7 @@ void cpu_unlock(void)
NULL, it means that the function was called in C code (i.e. not NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */ from generated code or from helper.c) */
/* XXX: fix it to restore all registers */ /* XXX: fix it to restore all registers */
void tlb_fill(unsigned long addr, int is_write, int is_user, void *retaddr) void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr)
{ {
TranslationBlock *tb; TranslationBlock *tb;
int ret; int ret;
...@@ -282,6 +282,15 @@ void set_cwp(int new_cwp) ...@@ -282,6 +282,15 @@ void set_cwp(int new_cwp)
env->regwptr = env->regbase + (new_cwp * 16); env->regwptr = env->regbase + (new_cwp * 16);
} }
void cpu_set_cwp(CPUState *env1, int new_cwp)
{
CPUState *saved_env;
saved_env = env;
env = env1;
set_cwp(new_cwp);
env = saved_env;
}
/* /*
* Begin execution of an interruption. is_int is TRUE if coming from * Begin execution of an interruption. is_int is TRUE if coming from
* the int instruction. next_eip is the EIP value AFTER the interrupt * the int instruction. next_eip is the EIP value AFTER the interrupt
...@@ -318,8 +327,7 @@ void do_interrupt(int intno, int is_int, int error_code, ...@@ -318,8 +327,7 @@ void do_interrupt(int intno, int is_int, int error_code,
#endif #endif
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
if (env->psret == 0) { if (env->psret == 0) {
fprintf(logfile, "Trap while interrupts disabled, Error state!\n"); cpu_abort(cpu_single_env, "Trap while interrupts disabled, Error state");
qemu_system_shutdown_request();
return; return;
} }
#endif #endif
......
target-sparc/op_helper.c
浏览文件 @ 0fa85d43
...@@ -108,7 +108,7 @@ void helper_ld_asi(int asi, int size, int sign) ...@@ -108,7 +108,7 @@ void helper_ld_asi(int asi, int size, int sign)
if (size == 4) if (size == 4)
bswap32s(&ret); bswap32s(&ret);
else if (size == 2) else if (size == 2)
bswap16s(&ret); bswap16s((uint16_t *)&ret);
break; break;
default: default:
ret = 0; ret = 0;
...@@ -198,7 +198,7 @@ void helper_st_asi(int asi, int size, int sign) ...@@ -198,7 +198,7 @@ void helper_st_asi(int asi, int size, int sign)
if (size == 4) if (size == 4)
bswap32s(&temp); bswap32s(&temp);
else if (size == 2) else if (size == 2)
bswap16s(&temp); bswap16s((uint16_t *)&temp);
cpu_physical_memory_write(T0, (void *) &temp, size); cpu_physical_memory_write(T0, (void *) &temp, size);
} }
......
target-sparc/op_mem.h
浏览文件 @ 0fa85d43
...@@ -2,13 +2,13 @@ ...@@ -2,13 +2,13 @@
#define SPARC_LD_OP(name, qp) \ #define SPARC_LD_OP(name, qp) \
void OPPROTO glue(glue(op_, name), MEMSUFFIX)(void) \ void OPPROTO glue(glue(op_, name), MEMSUFFIX)(void) \
{ \ { \
T1 = glue(qp, MEMSUFFIX)((void *)T0); \ T1 = glue(qp, MEMSUFFIX)(T0); \
} }
#define SPARC_ST_OP(name, op) \ #define SPARC_ST_OP(name, op) \
void OPPROTO glue(glue(op_, name), MEMSUFFIX)(void) \ void OPPROTO glue(glue(op_, name), MEMSUFFIX)(void) \
{ \ { \
glue(op, MEMSUFFIX)((void *)T0, T1); \ glue(op, MEMSUFFIX)(T0, T1); \
} }
SPARC_LD_OP(ld, ldl); SPARC_LD_OP(ld, ldl);
...@@ -24,48 +24,48 @@ SPARC_ST_OP(sth, stw); ...@@ -24,48 +24,48 @@ SPARC_ST_OP(sth, stw);
void OPPROTO glue(op_std, MEMSUFFIX)(void) void OPPROTO glue(op_std, MEMSUFFIX)(void)
{ {
glue(stl, MEMSUFFIX)((void *) T0, T1); glue(stl, MEMSUFFIX)(T0, T1);
glue(stl, MEMSUFFIX)((void *) (T0 + 4), T2); glue(stl, MEMSUFFIX)((T0 + 4), T2);
} }
void OPPROTO glue(op_ldstub, MEMSUFFIX)(void) void OPPROTO glue(op_ldstub, MEMSUFFIX)(void)
{ {
T1 = glue(ldub, MEMSUFFIX)((void *) T0); T1 = glue(ldub, MEMSUFFIX)(T0);
glue(stb, MEMSUFFIX)((void *) T0, 0xff); /* XXX: Should be Atomically */ glue(stb, MEMSUFFIX)(T0, 0xff); /* XXX: Should be Atomically */
} }
void OPPROTO glue(op_swap, MEMSUFFIX)(void) void OPPROTO glue(op_swap, MEMSUFFIX)(void)
{ {
unsigned int tmp = glue(ldl, MEMSUFFIX)((void *) T0); unsigned int tmp = glue(ldl, MEMSUFFIX)(T0);
glue(stl, MEMSUFFIX)((void *) T0, T1); /* XXX: Should be Atomically */ glue(stl, MEMSUFFIX)(T0, T1); /* XXX: Should be Atomically */
T1 = tmp; T1 = tmp;
} }
void OPPROTO glue(op_ldd, MEMSUFFIX)(void) void OPPROTO glue(op_ldd, MEMSUFFIX)(void)
{ {
T1 = glue(ldl, MEMSUFFIX)((void *) T0); T1 = glue(ldl, MEMSUFFIX)(T0);
T0 = glue(ldl, MEMSUFFIX)((void *) (T0 + 4)); T0 = glue(ldl, MEMSUFFIX)((T0 + 4));
} }
/*** Floating-point store ***/ /*** Floating-point store ***/
void OPPROTO glue(op_stf, MEMSUFFIX) (void) void OPPROTO glue(op_stf, MEMSUFFIX) (void)
{ {
glue(stfl, MEMSUFFIX)((void *) T0, FT0); glue(stfl, MEMSUFFIX)(T0, FT0);
} }
void OPPROTO glue(op_stdf, MEMSUFFIX) (void) void OPPROTO glue(op_stdf, MEMSUFFIX) (void)
{ {
glue(stfq, MEMSUFFIX)((void *) T0, DT0); glue(stfq, MEMSUFFIX)(T0, DT0);
} }
/*** Floating-point load ***/ /*** Floating-point load ***/
void OPPROTO glue(op_ldf, MEMSUFFIX) (void) void OPPROTO glue(op_ldf, MEMSUFFIX) (void)
{ {
FT0 = glue(ldfl, MEMSUFFIX)((void *) T0); FT0 = glue(ldfl, MEMSUFFIX)(T0);
} }
void OPPROTO glue(op_lddf, MEMSUFFIX) (void) void OPPROTO glue(op_lddf, MEMSUFFIX) (void)
{ {
DT0 = glue(ldfq, MEMSUFFIX)((void *) T0); DT0 = glue(ldfq, MEMSUFFIX)(T0);
} }
#undef MEMSUFFIX #undef MEMSUFFIX
target-sparc/translate.c
浏览文件 @ 0fa85d43
...@@ -291,10 +291,7 @@ GEN32(gen_op_store_DT2_fpr, gen_op_store_DT2_fpr_fprf); ...@@ -291,10 +291,7 @@ GEN32(gen_op_store_DT2_fpr, gen_op_store_DT2_fpr_fprf);
#if defined(CONFIG_USER_ONLY) #if defined(CONFIG_USER_ONLY)
#define gen_op_ldst(name) gen_op_##name##_raw() #define gen_op_ldst(name) gen_op_##name##_raw()
#define OP_LD_TABLE(width) \ #define OP_LD_TABLE(width)
static void gen_op_##width##a(int insn, int is_ld, int size, int sign) \
{ \
}
#define supervisor(dc) 0 #define supervisor(dc) 0
#else #else
#define gen_op_ldst(name) (*gen_op_##name[dc->mem_idx])() #define gen_op_ldst(name) (*gen_op_##name[dc->mem_idx])()
...@@ -614,12 +611,14 @@ static void do_fbranch(DisasContext * dc, uint32_t target, uint32_t insn) ...@@ -614,12 +611,14 @@ static void do_fbranch(DisasContext * dc, uint32_t target, uint32_t insn)
} }
} }
#if 0
static void gen_debug(DisasContext *s, uint32_t pc) static void gen_debug(DisasContext *s, uint32_t pc)
{ {
gen_op_jmp_im(pc); gen_op_jmp_im(pc);
gen_op_debug(); gen_op_debug();
s->is_br = 1; s->is_br = 1;
} }
#endif
#define GET_FIELDs(x,a,b) sign_extend (GET_FIELD(x,a,b), (b) - (a) + 1) #define GET_FIELDs(x,a,b) sign_extend (GET_FIELD(x,a,b), (b) - (a) + 1)
...@@ -633,7 +632,7 @@ static void disas_sparc_insn(DisasContext * dc) ...@@ -633,7 +632,7 @@ static void disas_sparc_insn(DisasContext * dc)
{ {
unsigned int insn, opc, rs1, rs2, rd; unsigned int insn, opc, rs1, rs2, rd;
insn = ldl_code((uint8_t *)dc->pc); insn = ldl_code(dc->pc);
opc = GET_FIELD(insn, 0, 1); opc = GET_FIELD(insn, 0, 1);
rd = GET_FIELD(insn, 2, 6); rd = GET_FIELD(insn, 2, 6);
...@@ -1290,6 +1289,12 @@ static void disas_sparc_insn(DisasContext * dc) ...@@ -1290,6 +1289,12 @@ static void disas_sparc_insn(DisasContext * dc)
gen_movl_reg_T1(rd); gen_movl_reg_T1(rd);
gen_op_swapa(insn, 1, 4, 0); gen_op_swapa(insn, 1, 4, 0);
break; break;
/* avoid warnings */
(void) &gen_op_stfa;
(void) &gen_op_stdfa;
(void) &gen_op_ldfa;
(void) &gen_op_lddfa;
#endif #endif
default: default:
goto illegal_insn; goto illegal_insn;
...@@ -1520,8 +1525,8 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb, ...@@ -1520,8 +1525,8 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
#ifdef DEBUG_DISAS #ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_IN_ASM) { if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "--------------\n"); fprintf(logfile, "--------------\n");
fprintf(logfile, "IN: %s\n", lookup_symbol((uint8_t *)pc_start)); fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
disas(logfile, (uint8_t *)pc_start, last_pc + 4 - pc_start, 0, 0); target_disas(logfile, pc_start, last_pc + 4 - pc_start, 0);
fprintf(logfile, "\n"); fprintf(logfile, "\n");
if (loglevel & CPU_LOG_TB_OP) { if (loglevel & CPU_LOG_TB_OP) {
fprintf(logfile, "OP:\n"); fprintf(logfile, "OP:\n");
...@@ -1626,6 +1631,10 @@ target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr) ...@@ -1626,6 +1631,10 @@ target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
} }
#else #else
extern int get_physical_address (CPUState *env, uint32_t *physical, int *prot,
int *access_index, uint32_t address, int rw,
int is_user);
target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr) target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{ {
uint32_t phys_addr; uint32_t phys_addr;
......
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