From 0e7b176ae01d5a664d4cbf619a7315819494e6cb Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 24 Oct 2014 12:19:13 +0100 Subject: [PATCH] target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any" For the CPU type "any" (only used with linux-user) we were reporting the L1Ip field as 0b00, which is reserved. Change this field to 0b10 instead, indicating a VIPT icache as the comment describes. Reported-by: Laurent Desnogues Signed-off-by: Peter Maydell Reviewed-by: Laurent Desnogues Message-id: 1412966807-20844-1-git-send-email-peter.maydell@linaro.org --- target-arm/cpu64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index a95367af2b..bb778b3d92 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -151,7 +151,7 @@ static void aarch64_any_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); set_feature(&cpu->env, ARM_FEATURE_CRC); - cpu->ctr = 0x80030003; /* 32 byte I and D cacheline size, VIPT icache */ + cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */ cpu->dcz_blocksize = 7; /* 512 bytes */ } #endif -- GitLab