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    target-i386: preserve FPU and MSR state on INIT · 43175fa9
    Paolo Bonzini 提交于
    Most MSRs, plus the FPU, MMX, MXCSR, XMM and YMM registers should not
    be zeroed on INIT (Table 9-1 in the Intel SDM).  Copy them out of
    CPUX86State and back in, instead of special casing env->pat.
    
    The relevant fields are already consecutive except PAT and SMBASE.
    However:
    
    - KVM and Hyper-V MSRs should be reset because they include memory
    locations written by the hypervisor.  These MSRs are moved together
    at the end of the preserved area.
    
    - SVM state can be moved out of the way since it is written by VMRUN.
    
    Cc: Andreas Faerber <afaerber@suse.de>
    Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
    Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
    43175fa9
helper.c 42.4 KB