From f411b7ef68221e82dec0129aaf2f2a26a8987504 Mon Sep 17 00:00:00 2001
From: Jiri Denemark <jdenemar@redhat.com>
Date: Thu, 12 Dec 2019 15:12:05 +0100
Subject: [PATCH] cpu_map: Add TSX_CTRL bit for IA32_ARCH_CAPABILITIES MSR
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

CVE-2019-11135

When TSX_CTRL bit of IA32_ARCH_CAPABILITIES MSR is set to 1, the CPU
supports IA32_TSX_CTRL MSR which can be used to disable and/or mask TSX.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
---
 src/cpu_map/x86_features.xml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
index d1180ed26d..b42b490160 100644
--- a/src/cpu_map/x86_features.xml
+++ b/src/cpu_map/x86_features.xml
@@ -502,6 +502,9 @@
   <feature name='mds-no'>
     <msr index='0x10a' edx='0x00000000' eax='0x00000020'/>
   </feature>
+  <feature name='tsx-ctrl'>
+    <msr index='0x10a' edx='0x00000000' eax='0x00000080'/>
+  </feature>
   <feature name='taa-no'>
     <msr index='0x10a' edx='0x00000000' eax='0x00000100'/>
   </feature>
-- 
GitLab