/* * Copyright (C) 2009-2010 Texas Instruments Inc. * Mikkel Christensen * Felipe Balbi * * Modified from mach-omap2/board-ldp.c * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include #include #include #include #include #include #include #include #include #include #include #include #include "board-flash.h" #include "mux.h" #include "sdram-micron-mt46h32m32lf-6.h" #include "sdram-hynix-h8mbx00u0mer-0em.h" static void __init omap_zoom_init_irq(void) { if (machine_is_omap_zoom2()) omap2_init_common_hw(mt46h32m32lf6_sdrc_params, mt46h32m32lf6_sdrc_params); else if (machine_is_omap_zoom3()) omap2_init_common_hw(h8mbx00u0mer0em_sdrc_params, h8mbx00u0mer0em_sdrc_params); omap_init_irq(); omap_gpio_init(); } #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { /* WLAN IRQ - GPIO 162 */ OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), /* WLAN POWER ENABLE - GPIO 101 */ OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), /* WLAN SDIO: MMC3 CMD */ OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP), /* WLAN SDIO: MMC3 CLK */ OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), /* WLAN SDIO: MMC3 DAT[0-3] */ OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP), { .reg_offset = OMAP_MUX_TERMINATOR }, }; #else #define board_mux NULL #endif static struct mtd_partition zoom_nand_partitions[] = { /* All the partition sizes are listed in terms of NAND block size */ { .name = "X-Loader-NAND", .offset = 0, .size = 4 * (64 * 2048), /* 512KB, 0x80000 */ .mask_flags = MTD_WRITEABLE, /* force read-only */ }, { .name = "U-Boot-NAND", .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ .size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */ .mask_flags = MTD_WRITEABLE, /* force read-only */ }, { .name = "Boot Env-NAND", .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ .size = 2 * (64 * 2048), /* 256KB, 0x40000 */ }, { .name = "Kernel-NAND", .offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/ .size = 240 * (64 * 2048), /* 30M, 0x1E00000 */ }, { .name = "system", .offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */ .size = 3328 * (64 * 2048), /* 416M, 0x1A000000 */ }, { .name = "userdata", .offset = MTDPART_OFS_APPEND, /* Offset = 0x1C000000*/ .size = 256 * (64 * 2048), /* 32M, 0x2000000 */ }, { .name = "cache", .offset = MTDPART_OFS_APPEND, /* Offset = 0x1E000000*/ .size = 256 * (64 * 2048), /* 32M, 0x2000000 */ }, }; static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, .phy_reset = true, .reset_gpio_port[0] = -EINVAL, .reset_gpio_port[1] = 64, .reset_gpio_port[2] = -EINVAL, }; static void __init omap_zoom_init(void) { if (machine_is_omap_zoom2()) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); } else if (machine_is_omap_zoom3()) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); omap_mux_init_gpio(64, OMAP_PIN_OUTPUT); usb_ehci_init(&ehci_pdata); } board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS); zoom_debugboard_init(); zoom_peripherals_init(); } MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap_zoom_init_irq, .init_machine = omap_zoom_init, .timer = &omap_timer, MACHINE_END MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, .init_irq = omap_zoom_init_irq, .init_machine = omap_zoom_init, .timer = &omap_timer, MACHINE_END