MX53_PAD_PATA_DATA6 can have the following alternate modes:

PATA_DATA_6:  		mode 0
GPIO2_6:		mode 1
EMI_NANDF_D_6:		mode 3
ESDHC4_DAT6		mode 4
GPU3d_GPU_DEBUG_OUT_6	mode 5
IPU_DIAG_BUS_6		mode 6

Fix the modes accordingly.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NDinh Nguyen <dinh.nguyen@freescale.com>
Acked-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This iomux file contains all the available pins that are iomux
capable.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add IOMUX pad entry for ecspi
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. Add entries to Kconfig
2. Add machine definition
3. Add Uart platform data, pad setting and base address
4. Adjust GPIO irq number
Signed-off-by: NYong Shen <yong.shen@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add iomux, clocks,  and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>