1. 13 12月, 2015 3 次提交
  2. 07 12月, 2015 1 次提交
  3. 02 12月, 2015 3 次提交
  4. 26 11月, 2015 4 次提交
  5. 18 11月, 2015 1 次提交
  6. 13 10月, 2015 1 次提交
    • A
      cfg80211: Add multiple scan plans for scheduled scan · 3b06d277
      Avraham Stern 提交于
      Add the option to configure multiple 'scan plans' for scheduled scan.
      Each 'scan plan' defines the number of scan cycles and the interval
      between scans. The scan plans are executed in the order they were
      configured. The last scan plan will always run infinitely and thus
      defines only the interval between scans.
      The maximum number of scan plans supported by the device and the
      maximum number of iterations in a single scan plan are advertised
      to userspace so it can configure the scan plans appropriately.
      
      When scheduled scan results are received there is no way to know which
      scan plan is being currently executed, so there is no way to know when
      the next scan iteration will start. This is not a problem, however.
      The scan start timestamp is only used for flushing old scan results,
      and there is no difference between flushing all results received until
      the end of the previous iteration or the start of the current one,
      since no results will be received in between.
      Signed-off-by: NAvraham Stern <avraham.stern@intel.com>
      Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
      Signed-off-by: NJohannes Berg <johannes.berg@intel.com>
      3b06d277
  7. 05 10月, 2015 5 次提交
  8. 21 9月, 2015 2 次提交
  9. 28 8月, 2015 1 次提交
  10. 23 8月, 2015 1 次提交
  11. 18 8月, 2015 2 次提交
  12. 16 8月, 2015 1 次提交
  13. 05 8月, 2015 5 次提交
    • M
      iwlwifi: mvm: Add FW paging mechanism for the UMAC on SDIO · e1120187
      Matti Gottlieb 提交于
      Family 8000 products has 2 embedded processors, the first
      known as LMAC (lower MAC) and implements the functionality from
      previous products, the second one is known as UMAC (upper MAC)
      and is used mainly for driver offloads as well as new features.
      The UMAC is typically “less” real-time than the LMAC and is used
      for higher level controls.
      The UMAC's code/data size is estimated to be in the mega-byte arena,
      taking into account the code it needs to replace in the driver and
      the set of new features.
      
      In order to allow the UMAC to execute code that is bigger than its code
      memory, we allow the UMAC embedded processor to page out code pages on
      DRAM.
      
      When the device is slave on the bus(SDIO) the driver saves the UMAC's
      image pages in blocks of 32K in the DRAM and sends the layout of the
      pages to the FW. When the FW wants load / unload pages, it creates an
      interrupt,	and the driver uploads / downloads the page to an address in
      the a specific address on the device's memory.
      
      The driver can support up to 1 MB of pages.
      
      Add paging mechanism for the UMAC on SDIO in order to allow the program to
      use a larger virtual space while using less physical memory on the device
      itself.
      Signed-off-by: NMatti Gottlieb <matti.gottlieb@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      e1120187
    • O
      iwlwifi: mvm: add the ability to trigger only monitor dumps · 36fb9017
      Oren Givon 提交于
      Change the FW debug trigger tlv to include a monitor only
      option. Setting this option to true will cause fw dump triggers
      to only collect monitor data and skip other dumps such as
      SMEM, SRAM, CSR, PRPH, etc.
      This option is used when accessing the different parts of the
      firmware memory is not wanted and can cause unwanted behavior
      like when debugging TX latency.
      Signed-off-by: NOren Givon <oren.givon@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      36fb9017
    • M
      iwlwifi: mvm: Add FW paging mechanism for the UMAC on PCI · a6c4fb44
      Matti Gottlieb 提交于
      Family 8000 products has 2 embedded processors, the first
      known as LMAC (lower MAC) and implements the functionality from
      previous products, the second one is known as UMAC (upper MAC)
      and is used mainly for driver offloads as well as new features.
      The UMAC is typically “less” real-time than the LMAC and is used
      for higher level controls.
      The UMAC's code/data size is estimated to be in the mega-byte arena,
      taking into account the code it needs to replace in the driver and
      the set of new features.
      
      In order to allow the UMAC to execute code that is bigger than its code
      memory, we allow the UMAC embedded processor to page out code pages on
      DRAM.
      
      When the device is master on the bus(PCI) the driver saves the UMAC's
      image pages in blocks of 32K in the DRAM and sends the layout of the
      pages to the FW. The FW can load / unload the pages on its own.
      
      The driver can support up to 1 MB of pages.
      
      Add paging mechanism for the UMAC on PCI in order to allow the program
      to use a larger virtual space while using less physical memory on the
      device.
      Signed-off-by: NEran Harary <eran.harary@intel.com>
      Signed-off-by: NMatti Gottlieb <matti.gottlieb@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      a6c4fb44
    • S
      iwlwifi: mvm: add wide firmware command support for debug triggers · 0ab66e6d
      Sara Sharon 提交于
      Add support for extended command id in triggers handling.
      Extended command id header contains group id in addition to command id.
      Signed-off-by: NSara Sharon <sara.sharon@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      0ab66e6d
    • A
      iwlwifi: mvm: add wide firmware command infrastructure for RX · 1230b16b
      Avraham Stern 提交于
      Add support for extended firmware event header that contains
      a group id as well as the command id.
      Signed-off-by: NAvraham Stern <avraham.stern@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      1230b16b
  14. 04 8月, 2015 4 次提交
  15. 17 7月, 2015 1 次提交
    • J
      mac80211: don't store napi struct · af9f9b22
      Johannes Berg 提交于
      When introducing multiple RX queues, a single NAPI struct will not
      be sufficient. Instead of trying to store multiple, simply change
      the API to have the NAPI struct passed to the RX function. This of
      course means that drivers using rx_irqsafe() cannot use NAPI, but
      that seems a reasonable trade-off, particularly since only two of
      all drivers are currently using it at all.
      
      While at it, we can now remove the IEEE80211_RX_REORDER_TIMER flag
      again since this code path cannot have a napi struct anyway.
      Signed-off-by: NJohannes Berg <johannes.berg@intel.com>
      af9f9b22
  16. 26 6月, 2015 1 次提交
  17. 03 6月, 2015 3 次提交
  18. 28 5月, 2015 1 次提交