- 19 7月, 2014 1 次提交
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由 Tomasz Figa 提交于
When CPU topology is specified in device tree, cpu_logical_map() does not return core ID anymore, but rather full MPIDR value. This breaks existing calculation of PMU register offsets on Exynos SoCs. This patch fixes the problem by adjusting the code to use only core ID bits of the value returned by cpu_logical_map() to allow CPU topology to be specified in device tree on Exynos SoCs. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 11 7月, 2014 2 次提交
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由 Tomasz Figa 提交于
Currently, the exynos cpuidle driver works correctly only on exynos4210 and 5250. Trying to use it with just one CPU online on any other exynos SoCs will lead to system failure, due to unsupported AFTR mode on other SoCs. This patch fixes the problem by registering the driver only on supported SoCs and letting others simply use default WFI mode until support for them is added. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Prathyush K 提交于
While powering on/off a local powerdomain in exynos5 chipsets, the input clocks to each device gets modified. This behaviour is based on the SYSCLK_SYS_PWR_REG registers. E.g. SYSCLK_MFC_SYS_PWR_REG = 0x0, the parent of input clock to MFC (aclk333) gets modified to oscclk = 0x1, no change in clocks. The recommended value of SYSCLK_SYS_PWR_REG before power gating any domain is 0x0. So we must also restore the clocks while powering on a domain everytime. This patch adds the framework for getting the required mux and parent clocks through a power domain device node. With this patch, while powering off a domain, parent is set to oscclk and while powering back on, its re-set to the correct parent which is as per the recommended pd on/off sequence. Signed-off-by: NPrathyush K <prathyush.k@samsung.com> Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Signed-off-by: NArun Kumar K <arun.kk@samsung.com> Signed-off-by: NShaik Ameer Basha <shaik.ameer@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 08 7月, 2014 1 次提交
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由 Sachin Kamat 提交于
Almost all Exynos-series of SoCs that run in secure mode don't need additional offset for every CPU, with Exynos4412 being the only exception. Tested on Origen-Quad (Exynos4412) and Arndale-Octa (Exynos5420). While at it, fix the coding style (space around *). Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NTushar Behera <tushar.behera@linaro.org> Tested-by: NAndreas Faerber <afaerber@suse.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 05 7月, 2014 1 次提交
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由 Abhilash Kesavan 提交于
Commit 1754c42e("ARM: exynos: move sysram info to exynos.c") missed out the CONFIG_ prefix causing exynos_sysram_init() to get called twice for SMP configurations. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Reviewed-by: NSachin Kamat <sachin.kamat@samsug.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 21 6月, 2014 1 次提交
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由 Doug Anderson 提交于
On exynos mcpm systems the firmware is hardcoded to jump to an address in SRAM (0x02073000) when secondary CPUs come up. By default the firmware puts a bunch of code at that location. That code expects the kernel to fill in a few slots with addresses that it uses to jump back to the kernel's entry point for secondary CPUs. Originally (on prerelease hardware) this firmware code contained a bunch of workarounds to deal with boot ROM bugs. However on all shipped hardware we simply use this code to redirect to a kernel function for bringing up the CPUs. Let's stop relying on the code provided by the bootloader and just plumb in our own (simple) code jump to the kernel. This has the nice benefit of fixing problems due to the fact that older bootloaders (like the one shipped on the Samsung Chromebook 2) might have put slightly different code into this location. Once suspend/resume is implemented for systems using exynos-mcpm we'll need to make sure we reinstall our fixed up code after resume. ...but that's not anything new since IRAM (and thus the address of the mcpm_entry_point) is lost across suspend/resume anyway. Signed-off-by: NDoug Anderson <dianders@chromium.org> Acked-by: NKevin Hilman <khilman@linaro.org> Tested-by: NKevin Hilman <khilman@linaro.org> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 18 6月, 2014 1 次提交
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由 Abhilash Kesavan 提交于
We have an soc check to ensure that the scu and certain A9 specific registers are not accessed on Exynos5250 (which is A15 based). Rather than adding another soc specific check for 5420 let us test for the Cortex A9 primary part number. This resolves the below crash seen on exynos5420 during core switching after the CPUIdle consolidation series was merged. [ 155.975589] [<c0013174>] (scu_enable) from [<c001b0dc>] (exynos_cpu_pm_notifier+0x80/0xc4) [ 155.983833] [<c001b0dc>] (exynos_cpu_pm_notifier) from [<c003c1b0>] (notifier_call_chain+0x44/0x84) [ 155.992851] [<c003c1b0>] (notifier_call_chain) from [<c007a49c>] (cpu_pm_notify+0x20/0x3c) [ 156.001089] [<c007a49c>] (cpu_pm_notify) from [<c007a564>] (cpu_pm_exit+0x20/0x38) [ 156.008635] [<c007a564>] (cpu_pm_exit) from [<c0019e98>] (bL_switcher_thread+0x298/0x40c) [ 156.016788] [<c0019e98>] (bL_switcher_thread) from [<c003842c>] (kthread+0xcc/0xe8) [ 156.024426] [<c003842c>] (kthread) from [<c000e438>] (ret_from_fork+0x14/0x3c) [ 156.031621] Code: ea017fec c0530a00 c052e3f8 c0012dcc (e5903000 Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 17 6月, 2014 4 次提交
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由 Rob Herring 提交于
The System Type menu is getting quite long with platforms and is inconsistent in handling of sub-arch specific options. Tidy up the menu by making platform options a menuconfig entry containing any platform specific config items. [arnd: change OMAP part according to suggestion from Tony Lindgren <tony@atomide.com>] Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Sachin Kamat 提交于
of_get_flat_dt_prop return type is now const. Fixes the following compilation warning introduced by commit 9d0c4dfe ("of/fdt: update of_get_flat_dt_prop in prep for libfdt") arch/arm/mach-exynos/exynos.c:259:6: warning: assignment discards ‘const’ qualifier from pointer target type [enabled by default] Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Reviewed-by: NTushar Behera <tushar.behera@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Olof Johansson 提交于
This solves a problem with building with CONFIG_SMP=n due to missing sysram_base_addr (or sysram_ns_base_addr) variables. The new setup method is more awkward than I'd like for it to be, but it can't be done in init_early() since ioremap is not yet available, but it needs to happen before SMP. Reported-by: NRussell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Stephen Boyd 提交于
This config exists entirely to hide the cpufreq menu from the kernel configuration unless a platform has selected it. Nothing is actually built if this config is 'Y' and it just leads to more patches that add a select under a platform Kconfig so that some other CPUfreq option can be chosen. Let's remove the option so that we can always enable CPUfreq drivers on ARM platforms. Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 16 6月, 2014 1 次提交
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由 Leela Krishna Amudala 提交于
This patch is originally based on commit b3377d18 ("ARM: 7064/1: vexpress: Use wfi macro in platform_do_lowpower.") Current Exynos CPU hotplug code includes a hardcoded WFI instruction, in ARM encoding. When the kernel is compiled in Thumb-2 mode, this is invalid and causes the machine to hang hard when a CPU is offlined. Use wfi macro instead of the hardcoded WFI instruction. Signed-off-by: NLeela Krishna Amudala <leela.krishna@linaro.org> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 01 6月, 2014 1 次提交
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由 Olof Johansson 提交于
This was caught by a panic on Broadcom mobile platforms. Note that this code is all going away with the pending l2x0 cleanup series from Russell, but we need this here until that's landed so we can enable exynos multiplatform. Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 31 5月, 2014 10 次提交
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由 Abhilash Kesavan 提交于
This fixes the following build errors: /tmp/ccRbZlaA.s: Assembler messages: /tmp/ccRbZlaA.s:69: Error: selected processor does not support ARM mode `isb ' /tmp/ccRbZlaA.s:75: Error: selected processor does not support ARM mode `isb ' /tmp/ccRbZlaA.s:76: Error: selected processor does not support ARM mode `dsb ' make[1]: *** [arch/arm/mach-exynos/hotplug.o] Error 1 /tmp/ccJEg4jw.s: Assembler messages: /tmp/ccJEg4jw.s:454: Error: selected processor does not support ARM mode `isb' /tmp/ccJEg4jw.s:455: Error: selected processor does not support ARM mode `dsb' /tmp/ccJEg4jw.s:465: Error: selected processor does not support ARM mode `isb' /tmp/ccJEg4jw.s:474: Error: selected processor does not support ARM mode `isb' /tmp/ccJEg4jw.s:475: Error: selected processor does not support ARM mode `dsb' /tmp/ccJEg4jw.s:516: Error: selected processor does not support ARM mode `isb' /tmp/ccJEg4jw.s:525: Error: selected processor does not support ARM mode `isb' /tmp/ccJEg4jw.s:526: Error: selected processor does not support ARM mode `dsb' make[1]: *** [arch/arm/mach-exynos/mcpm-exynos.o] Error 1 Reported-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Tested-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Kukjin Kim 提交于
Since commit 166aaf39 ("ARM: 8029/1: mcpm: Rename the power_down_finish() functions to be less confusing") changed the name of power_down_finish to wait_for_cpu_powerdown, so use new member name wait_for_cpu_powerdown. Reported-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Abhilash Kesavan 提交于
The exynos5800 is very similar to exynos5420. We can re-use the existing MCPM support for exynos5800 for secondary boot -up and switching. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Arnd Bergmann 提交于
This makes it possible to enable the Exynos platform as part of a multiplatform kernel. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sachin Kamat 提交于
Instead of repeating the Kconfig entries for every SoC, move them under ARCH_EXYNOS3, 4 and 5 and move the entries common to 3, 4 and 5 under ARCH_EXYNOS. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tarek Dakhran 提交于
EXYNOS5410 is SoC in Samsung's Exynos5 SoC series. Add initial support for this SoC. Signed-off-by: NTarek Dakhran <t.dakhran@samsung.com> Signed-off-by: NVyacheslav Tyrtov <v.tyrtov@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Chanwoo Choi 提交于
This patch fix the offset of CPU boot address and don't need to send smc call of SMC_CMD_CPU1BOOT command for secondary CPU boot because Exynos3250 removes WFE in secure mode. Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Chanwoo Choi 提交于
This patch add Exynos3250's SoC ID. Exynos 3250 is SoC that is based on the 32-bit RISC processor for Smartphone. Exynos3250 uses Cortex-A7 dual cores and has a target speed of 1.0GHz. Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Arun Kumar K 提交于
Exynos5800 is an octa core SoC which is based on the 5420 platform. This patch adds the basic support for it in the mach-exynos. Signed-off-by: NArun Kumar K <arun.kk@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Pankaj Dubey 提交于
This patch add basic arch side support for exynos5260 SoC. Note that this is required to enable build for clock driver. Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 30 5月, 2014 5 次提交
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由 Russell King 提交于
exynos was unconditionally calling the L2 cache initialisation from an early_initcall. This breaks multiplatform kernels. Thankfully, converting to generic l2c initialisation fixes this. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The cache size should already be present in the L2 cache auxiliary control register: it is part of the integration process to configure the hardware IP. Most platforms get this right, yet still many cargo-cult program, and assume that they always need specifying to the L2 cache code. Remove them so we can find out which really need this. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Since we now automatically enable early BRESP in core L2C-310 code when we detect a Cortex-A9, we don't need platforms/SoCs to set this bit explicitly. Instead, they should seek to preserve the value of bit 30 in the auxiliary control register. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
We have a mixture of different devices with different register layouts, but we group all the bits together in an opaque mess. Split them out into those which are L2C-310 specific and ones which refer to earlier devices. Provide full auxiliary control register definitions. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 26 5月, 2014 12 次提交
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由 Daniel Lezcano 提交于
A look at the code reveals use of S5P_VA_SYSRAM macro, in case of certain SoC revisions, which is not valid any longer, after SYSRAM started to be mapped dynamically. The new dynamic mapping is stored in sysram_base_addr variable, which is declared static in platsmp.c This fix makes sysram_base_addr non-static, declared it in common.h and used in pm.c instead of S5P_VA_SYSRAM. Suggested-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
No more dependency on the arch code. The platform_data field is used to set the PM callback as the other cpuidle drivers. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
This macro is only used there. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
The code to initiate and exit the powerdown sequence is the same in pm.c and cpuidle.c. Let's split the common part in the pm.c and reuse it from the cpu_pm notifier. That is one more step forward to make the cpuidle driver arch indenpendant. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
In order to remove depedency on pm code, let's move the 'exynos_enter_aftr' function into the pm.c file as well as the other helper functions. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
Let's encapsulate the AFTR state specific call into a single function. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
There is no point to register the cpuidle driver for the 5440 as it has only one WFI state which is the default idle function when the cpuidle driver is disabled. By disabling cpuidle we prevent to enter to the governor computation for nothing, thus saving a lot of processing time. The only drawback is the statistic via sysfs on this state which is lost but it is meaningless and it could be retrieved from the ftrace easily. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NAmit Kucheria <amit.kucheria@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
Pass the wakeup mask to 'exynos_set_wakeupmask' as this function could be used for different idle states with different mask. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daniel Lezcano 提交于
The scu_enable function is already a noop in the scu's header file is CONFIG_SMP=n, so no need to use these macros in the code. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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