1. 29 11月, 2018 1 次提交
    • N
      drm/amd/display: Use private obj helpers for dm_atomic_state · eb3dc897
      Nicholas Kazlauskas 提交于
      [Why]
      Two non-blocking commits in succession can result in a sequence where
      the same dc->current_state is queried for both commits.
      
      1. 1st commit -> check -> commit -> swaps atomic state -> queues work
      2. 2nd commit -> check -> commit -> swaps atomic state -> queues work
      3. 1st commit work finishes
      
      The issue with this sequence is that the same dc->current_state is
      read in both atomic checks. If the first commit modifies streams or
      planes those will be missing from the dc->current_state for the
      second atomic check. This result in many stream and plane errors in
      atomic commit tail.
      
      [How]
      The driver still needs to track old to new state to determine if the
      commit in its current implementation. Updating the dc_state in
      atomic tail is wrong since the dc_state swap should be happening as
      part of drm_atomic_helper_swap_state *before* the worker queue kicks
      its work off.
      
      The simplest replacement for the subclassing (which doesn't properly
      manage the old to new atomic state swap) is to use the drm private
      object helpers. While some of the dc_state members could be merged
      into dm_crtc_state or dm_plane_state and copied over that way it is
      easier for now to just treat the whole dc_state structure as a single
      private object.
      
      This allows amdgpu_dm to drop the dc->current_state copy from within
      atomic check. It's replaced by a copy from the current atomic state
      which is propagated correctly for the sequence described above.
      
      Since access to the dm_state private object is now locked this should
      also fix issues that could arise if submitting non-blocking commits
      from different threads.
      
      Cc: Harry Wentland <harry.wentland@amd.com>
      Cc: Leo Li <sunpeng.li@amd.com>
      Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
      Reviewed-by: NLeo Li <sunpeng.li@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      eb3dc897
  2. 27 11月, 2018 2 次提交
    • D
      drm/amd: Query and use ACPI backlight caps · 206bbafe
      David Francis 提交于
      ACPI ATIF has a function called query
      backlight transfer characteristics.  Among the
      information returned by this function is
      the minimum and maximum input signals for the
      backlight
      
      Call that function on ACPI init.  When DM
      backlight device is updated, copy over the
      backlight caps into DM, but only once.  Use
      the backlight caps in the backlight-to-dc
      calculation
      Signed-off-by: NDavid Francis <David.Francis@amd.com>
      Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      206bbafe
    • D
      drm/amd: Add abm level drm property · c1ee92f9
      David Francis 提交于
      Adaptive Backlight Management (ABM) is a feature
      that reduces backlight level to save power, while
      increasing pixel contrast and pixel luminance
      to maintain readability and image quality.
      
      ABM will adjust in response to the
      pixel luminance of the displayed content.
      
      ABM is made available as a drm property on eDP
      monitors called "abm level", which ranges from 0 to 4.
      When this property is set to 0, ABM is off.  Levels 1
      to 4 represent different ranges of backlight reduction.
      At higher levels both the backlight reduction and pixel
      adjustment will be greater.
      
      ABM requires DMCU firmware, which is currently available for
      Raven ASICs only.  If the feature does not work, please
      ensure your firmware is up to date.
      
      v2:
      Fix commit message, only attach property if DMCU loaded
      v3:
      Store ABM level in crtc state to accommodate dc
      v4:
      Fix ABM saving on dpms cycle
      Signed-off-by: NDavid Francis <David.Francis@amd.com>
      Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      c1ee92f9
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