- 22 10月, 2014 1 次提交
-
-
由 Dinh Nguyen 提交于
When CPU1 is brought out of reset, it's MMU is not turned on yet, so it will only be able to use physical addresses. For systems with that have the MMU page configured for 0xC0000000, 0x80000000, or 0x40000000 "BIC 0x40000000" will work just fine, as it was just converting the virtual address of &cpu1start_addr into a physical address, ie. 0xC0000000 became 0x80000000. So for systems where the SDRAM controller was able to do a wrap-around access, this was working fine, as it was just dropping the MSB, but for systems where out of bounds memory access is not allowed, this would not allow CPU1 to correctly fetch &cpu1start_addr. This patch fixes the secondary_trampoline code to correctly fetch the physical address of cpu1start_addr directly. The patch will subtract the correct PAGE_OFFSET from &cpu1start_addr. And since on this platform, the physical memory will always start at 0x0, subtracting PAGE_OFFSET from &cpu1start_addr will allow CPU1 to correctly fetch the value of cpu1start_addr. While at it, change the name of cpu1start_addr to socfpga_cpu1start_addr to avoid any future naming collisions for multiplatform image. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> --- v4: Updated commit log to correctly lay out the usage of PAGE_OFFSET and add comments to the same effect. v3: Used PAGE_OFFSET to get the physical address v2: Correctly get the physical address instead of just a BIC hack.
-
- 30 5月, 2014 1 次提交
-
-
由 Russell King 提交于
Remove the explicit call to l2x0_of_init(), converting to the generic infrastructure instead. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 22 5月, 2014 1 次提交
-
-
由 Russell King 提交于
They're u32, they're not unsigned long. The UL suffix is not required here. Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 19 2月, 2014 2 次提交
-
-
由 Dinh Nguyen 提交于
The only thing that socfpga_init_clocks was doing is setting up the smp_twd clk. Now that twd-timer's clock phandle is populated in the DTS, we can remove this function. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
-
由 Dinh Nguyen 提交于
The clk manager's base address was being mapped in SOCFPGA's arch code and being extern'ed out to the clock driver. This method is not correct, and the arch code was not really doing anything with that clk manager anyways. This patch moves the mapping of the clk manager's base address in the clock driver itself. Cleans up CLK_OF_DECLARE() into a single registration of all the clocks. Suggested-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Acked-by: NArnd Bergmann <arnd@arndb.de> --- v2: Use a static declaration for the clk_mgr_base_addr. Clean up the CLK_OF_DECLARE() as suggested by Arnd.
-
- 30 9月, 2013 2 次提交
-
-
由 Sebastian Hesselbarth 提交于
With arch/arm calling of_clk_init(NULL) from time_init(), we can now remove custom .init_time hooks. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: NDinh Nguyen <dinguyen@altera.com>
-
由 Sebastian Hesselbarth 提交于
Current socfpga board init calls of_clk_init() from .machine_init. To allow consolidation of DT driven .time_init, move of_clock_init() to a temporary .time_init that will be removed when arch-wide callback is available. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: NDinh Nguyen <dinguyen@altera.com>
-
- 10 7月, 2013 1 次提交
-
-
由 Robin Holt 提交于
Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: NRobin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 12 6月, 2013 1 次提交
-
-
由 Heiko Stuebner 提交于
dw_apb_timer_init used to search the devicetree for matching timer devices, making calls to it from board files necessary. Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE. With this change the function gets called once for each timer node and tracks these number of calls to attach clockevent and clocksource devices to the nodes. Also remove the calls to dw_apb_timer_init from all previous users, as clocksource_of_init is the default for init_time now. Tested on the upcoming rk3066 code. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NJamie Iles <jamie@jamieiles.com> Acked-by: NDinh Nguyen <dinguyen@altera.com>
-
- 15 4月, 2013 2 次提交
-
-
由 Dinh Nguyen 提交于
With this patch, the socfpga clk driver is able to query the clock and clock rates appropriately. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NPavel Machek <pavel@denx.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Dinh Nguyen 提交于
Enable a cold or warm reset to the HW from userspace. Also fix a few sparse errors: warning: symbol 'sys_manager_base_addr' was not declared. Should it be static? warning: symbol 'rst_manager_base_addr' was not declared. Should it be static? Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NPavel Machek <pavel@denx.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 12 2月, 2013 2 次提交
-
-
由 Dinh Nguyen 提交于
Because the CPU1 start address is different for socfpga-vt and socfpga-cyclone5, we add code to use the correct CPU1 start addr. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Signed-off-by: NPavel Machek <pavel@denx.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Dinh Nguyen 提交于
Up to this point, support for socfpga has only been on a virtual platform. Now that actual hardware is available, we add the appropriate device tree source files. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Tested-by: NPavel Machek <pavel@denx.de> Reviewed-by: NPavel Machek <pavel@denx.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 13 1月, 2013 2 次提交
-
-
由 Rob Herring 提交于
Convert all GIC DT initialization over to use common irqchip_init function. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org>
-
由 Rob Herring 提交于
Now that the GIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: NTony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: NStephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NArnd Bergmann <arnd@arndb.de>
-
- 25 12月, 2012 1 次提交
-
-
由 Stephen Warren 提交于
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 06 11月, 2012 1 次提交
-
-
由 Pavel Machek 提交于
Early printk code needs UART to be mapped early during boot. early_printk() is left there during the start-up; it is useful as our emulators are fairly slow. Signed-off-by: NPavel Machek <pavel@denx.de> Acked-by: NDinh Nguyen <dinguyen@altera.com> [olof: removed redundant newlines] Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 26 10月, 2012 1 次提交
-
-
由 Dinh Nguyen 提交于
Enable SMP for the SOCFPGA platform. Signed-off-by: NPavel Machek <pavel@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
- 19 7月, 2012 1 次提交
-
-
由 Dinh Nguyen 提交于
Adding core definitions for Altera's SOCFPGA ARM platform. Mininum support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NPavel Machek <pavel@denx.de> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-