提交 fd18c7ea 编写于 作者: H Hans de Goede 提交者: Maxime Ripard

ARM: dts: sunxi: Add simplefb nodes for de_be0-lcd0, de_be0-lcd0-tve0 pipelines

Add simplefb nodes for "[de_fe0-]de_be0-lcd0" and "[de_fe0-]de_be0-lcd0-tve0"
display pipelines for when u-boot has set up a pipeline to drive a LCD panel /
VGA output rather then the HDMI output.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
上级 7294be5d
...@@ -50,6 +50,24 @@ ...@@ -50,6 +50,24 @@
<&ahb_gates 44>, <&ahb_gates 46>; <&ahb_gates 44>, <&ahb_gates 46>;
status = "disabled"; status = "disabled";
}; };
framebuffer@2 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
<&ahb_gates 46>;
status = "disabled";
};
framebuffer@3 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
<&ahb_gates 44>, <&ahb_gates 46>;
status = "disabled";
};
}; };
cpus { cpus {
......
...@@ -39,6 +39,14 @@ ...@@ -39,6 +39,14 @@
<&ahb_gates 44>; <&ahb_gates 44>;
status = "disabled"; status = "disabled";
}; };
framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
status = "disabled";
};
}; };
cpus { cpus {
......
...@@ -24,6 +24,20 @@ ...@@ -24,6 +24,20 @@
serial1 = &uart3; serial1 = &uart3;
}; };
chosen {
#address-cells = <1>;
#size-cells = <1>;
ranges;
framebuffer@0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
status = "disabled";
};
};
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
...@@ -77,6 +77,14 @@ ...@@ -77,6 +77,14 @@
clocks = <&pll6 0>; clocks = <&pll6 0>;
status = "disabled"; status = "disabled";
}; };
framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&pll6 0>;
status = "disabled";
};
}; };
cpus { cpus {
......
...@@ -81,6 +81,23 @@ ...@@ -81,6 +81,23 @@
<&ahb_gates 44>; <&ahb_gates 44>;
status = "disabled"; status = "disabled";
}; };
framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
status = "disabled";
};
framebuffer@2 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
<&ahb_gates 44>;
status = "disabled";
};
}; };
cpus { cpus {
......
...@@ -65,6 +65,20 @@ ...@@ -65,6 +65,20 @@
serial5 = &r_uart; serial5 = &r_uart;
}; };
chosen {
#address-cells = <1>;
#size-cells = <1>;
ranges;
framebuffer@0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&pll6 0>;
status = "disabled";
};
};
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
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