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提交 fce5d073 编写于 作者: T Thierry Reding

arm64: tegra: Sort Tegra132 XUSB clocks correctly

Make the order of the clocks and clock-names properties match the order
in the device tree bindings. This isn't strictly necessary from a point
of view of the operating system because matching will be done based on
the clock-names, but it makes it easier to validate the device trees
against the DT schema.
Signed-off-by: NThierry Reding <treding@nvidia.com>
上级 9f27a6c4
...@@ -674,8 +674,8 @@ ...@@ -674,8 +674,8 @@
<&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>, <&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>, <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_SS>, <&tegra_car TEGRA124_CLK_XUSB_SS>,
<&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>, <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_HS_SRC>, <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FS_SRC>, <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA124_CLK_PLL_U_480M>, <&tegra_car TEGRA124_CLK_PLL_U_480M>,
...@@ -683,7 +683,7 @@ ...@@ -683,7 +683,7 @@
<&tegra_car TEGRA124_CLK_PLL_E>; <&tegra_car TEGRA124_CLK_PLL_E>;
clock-names = "xusb_host", "xusb_host_src", clock-names = "xusb_host", "xusb_host_src",
"xusb_falcon_src", "xusb_ss", "xusb_falcon_src", "xusb_ss",
"xusb_ss_src", "xusb_ss_div2", "xusb_ss_div2", "xusb_ss_src",
"xusb_hs_src", "xusb_fs_src", "xusb_hs_src", "xusb_fs_src",
"pll_u_480m", "clk_m", "pll_e"; "pll_u_480m", "clk_m", "pll_e";
resets = <&tegra_car 89>, <&tegra_car 156>, resets = <&tegra_car 89>, <&tegra_car 156>,
......
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