提交 fc849ba4 编写于 作者: Y Yiwen Jiang 提交者: Zheng Zengkai

kvm: arm/arm64: add irqsave for lpi_cache_lock

euleros inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I4J0W7
CVE: NA

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lpi_cache_lock can be called in irq context,
so it should use irqsave spinlock.
Signed-off-by: NYiwen Jiang <jiangyiwen@huawei.com>
Reviewed-by: NHailiang Zhang <zhang.zhanghailiang@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: NChaochao Xing <xingchaochao@huawei.com>
Reviewed-by: NXiangyou Xie <xiexiangyou@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
上级 c89f1e49
...@@ -593,15 +593,16 @@ static struct vgic_irq *vgic_its_check_cache(struct kvm *kvm, phys_addr_t db, ...@@ -593,15 +593,16 @@ static struct vgic_irq *vgic_its_check_cache(struct kvm *kvm, phys_addr_t db,
{ {
struct vgic_dist *dist = &kvm->arch.vgic; struct vgic_dist *dist = &kvm->arch.vgic;
struct vgic_irq *irq; struct vgic_irq *irq;
unsigned long flags;
int cpu; int cpu;
int cacheid; int cacheid;
cpu = smp_processor_id(); cpu = smp_processor_id();
cacheid = cpu % LPI_TRANS_CACHES_NUM; cacheid = cpu % LPI_TRANS_CACHES_NUM;
raw_spin_lock(&dist->lpi_translation_cache[cacheid].lpi_cache_lock); raw_spin_lock_irqsave(&dist->lpi_translation_cache[cacheid].lpi_cache_lock, flags);
irq = __vgic_its_check_cache(dist, db, devid, eventid, cacheid); irq = __vgic_its_check_cache(dist, db, devid, eventid, cacheid);
raw_spin_unlock(&dist->lpi_translation_cache[cacheid].lpi_cache_lock); raw_spin_unlock_irqrestore(&dist->lpi_translation_cache[cacheid].lpi_cache_lock, flags);
return irq; return irq;
} }
......
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