From f4977f37ed701f6d5b45754ba2d31b40c5f64238 Mon Sep 17 00:00:00 2001 From: Weili Qian Date: Thu, 22 Jul 2021 15:01:34 +0800 Subject: [PATCH] crypto: hisilicon/qm - fix the value of 'QM_SQC_VFT_BASE_MASK_V2' mainline inclusion from mainline-v5.12-rc1-dontuse commit 7f5151e5efbe8fc2293a77cb853679ceff46991b category: bugfix bugzilla: 173981 CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=7f5151e5efbe8fc2293a77cb853679ceff46991b ---------------------------------------------------------------------- Since the size of base number is 16 bits, update the value of 'QM_SQC_VFT_BASE_MASK_V2' as 'GENMASK(15, 0)'. Signed-off-by: Weili Qian Reviewed-by: Zaibo Xu Signed-off-by: Herbert Xu Signed-off-by: Mingqiang Ling Signed-off-by: Zheng Zengkai --- drivers/crypto/hisilicon/qm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 4a4ad82b08f2..0495113f952a 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -122,7 +122,7 @@ #define QM_CQC_VFT_VALID (1ULL << 28) #define QM_SQC_VFT_BASE_SHIFT_V2 28 -#define QM_SQC_VFT_BASE_MASK_V2 GENMASK(5, 0) +#define QM_SQC_VFT_BASE_MASK_V2 GENMASK(15, 0) #define QM_SQC_VFT_NUM_SHIFT_V2 45 #define QM_SQC_VFT_NUM_MASK_v2 GENMASK(9, 0) -- GitLab