ARM: dts: wpcm450: Add global control registers (GCR) node

The Global Control Registers (GCR) are a block of registers in Nuvoton
SoCs that expose misc functionality such as chip model and version
information or pinmux settings.

This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
enabling pinctrl on this SoC.
Signed-off-by: NJonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220129115228.2257310-4-j.neuschaefer@gmx.netSigned-off-by: NJoel Stanley <joel@jms.id.au>

arch/arm/boot/dts/nuvoton-wpcm450.dtsi

@@ -33,6 +33,11 @@
 		interrupt-parent = <&aic>;
 		ranges;
 
+		gcr: syscon@b0000000 {
+			compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
+			reg = <0xb0000000 0x200>;
+		};
+
 		serial0: serial@b8000000 {
 			compatible = "nuvoton,wpcm450-uart";
 			reg = <0xb8000000 0x20>;