提交 f0a48120 编写于 作者: T Thierry Reding

arm64: tegra: Drop arm,armv8-pmuv3 compatible string

The arm,armv8-pmuv3 compatible string is meant to be used only for
software models and not silicon chips. Drop them and use silicon-
specific compatible strings instead.
Signed-off-by: NThierry Reding <treding@nvidia.com>
上级 c6489c30
...@@ -1980,14 +1980,14 @@ ...@@ -1980,14 +1980,14 @@
}; };
pmu_denver { pmu_denver {
compatible = "nvidia,denver-pmu", "arm,armv8-pmuv3"; compatible = "nvidia,denver-pmu";
interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&denver_0 &denver_1>; interrupt-affinity = <&denver_0 &denver_1>;
}; };
pmu_a57 { pmu_a57 {
compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
......
...@@ -2886,7 +2886,7 @@ ...@@ -2886,7 +2886,7 @@
}; };
pmu { pmu {
compatible = "arm,armv8-pmuv3"; compatible = "nvidia,carmel-pmu";
interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
......
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