提交 edd4488a 编写于 作者: A Arnd Bergmann

ARM: remove tango platform

The smp8758 (tango4) SoC was the last generation of set-top-box chips
to come out of Sigma Designs, and support was added by Marc Gonzalez
and Måns Rullgård between 2015 and 2017, before the company went out of
business and the products were abandoned.

The chip is used in some set-top-boxes such as the Popcorn Hour A-500,
which could have seen some adoption by hobbyists. This has not happened
in the past four years, and support for the more widely used MIPS based
SoCs was never merged at all.

Thanks to Marc and Måns for maintaining for the past years even after the
death of the platform.

Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Mans Rullgard <mans@mansr.com>
Link: https://lore.kernel.org/lkml/2d643ebc-09af-a809-eb3f-2aec8ecee501@free.fr/Signed-off-by: NArnd Bergmann <arnd@arndb.de>
上级 89d4f98a
...@@ -2538,13 +2538,6 @@ F: arch/arm/boot/dts/berlin* ...@@ -2538,13 +2538,6 @@ F: arch/arm/boot/dts/berlin*
F: arch/arm/mach-berlin/ F: arch/arm/mach-berlin/
F: arch/arm64/boot/dts/synaptics/ F: arch/arm64/boot/dts/synaptics/
ARM/TANGO ARCHITECTURE
M: Marc Gonzalez <marc.w.gonzalez@free.fr>
M: Mans Rullgard <mans@mansr.com>
L: linux-arm-kernel@lists.infradead.org
S: Odd Fixes
N: tango
ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
M: Lennert Buytenhek <kernel@wantstofly.org> M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
......
...@@ -702,8 +702,6 @@ source "arch/arm/mach-stm32/Kconfig" ...@@ -702,8 +702,6 @@ source "arch/arm/mach-stm32/Kconfig"
source "arch/arm/mach-sunxi/Kconfig" source "arch/arm/mach-sunxi/Kconfig"
source "arch/arm/mach-tango/Kconfig"
source "arch/arm/mach-tegra/Kconfig" source "arch/arm/mach-tegra/Kconfig"
source "arch/arm/mach-u300/Kconfig" source "arch/arm/mach-u300/Kconfig"
......
...@@ -213,7 +213,6 @@ machine-$(CONFIG_ARCH_SOCFPGA) += socfpga ...@@ -213,7 +213,6 @@ machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_STI) += sti machine-$(CONFIG_ARCH_STI) += sti
machine-$(CONFIG_ARCH_STM32) += stm32 machine-$(CONFIG_ARCH_STM32) += stm32
machine-$(CONFIG_ARCH_SUNXI) += sunxi machine-$(CONFIG_ARCH_SUNXI) += sunxi
machine-$(CONFIG_ARCH_TANGO) += tango
machine-$(CONFIG_ARCH_TEGRA) += tegra machine-$(CONFIG_ARCH_TEGRA) += tegra
machine-$(CONFIG_ARCH_U300) += u300 machine-$(CONFIG_ARCH_U300) += u300
machine-$(CONFIG_ARCH_U8500) += ux500 machine-$(CONFIG_ARCH_U8500) += ux500
......
...@@ -1221,8 +1221,6 @@ dtb-$(CONFIG_MACH_SUN9I) += \ ...@@ -1221,8 +1221,6 @@ dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-cubieboard4.dtb sun9i-a80-cubieboard4.dtb
dtb-$(CONFIG_MACH_SUNIV) += \ dtb-$(CONFIG_MACH_SUNIV) += \
suniv-f1c100s-licheepi-nano.dtb suniv-f1c100s-licheepi-nano.dtb
dtb-$(CONFIG_ARCH_TANGO) += \
tango4-vantage-1172.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
tegra20-acer-a500-picasso.dtb \ tegra20-acer-a500-picasso.dtb \
tegra20-harmony.dtb \ tegra20-harmony.dtb \
......
// SPDX-License-Identifier: GPL-2.0
/*
* Based on Mans Rullgard's Tango3 DT
* https://github.com/mansr/linux-tangox
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#define CPU_CLK 0
#define SYS_CLK 1
#define USB_CLK 2
#define SDIO_CLK 3
/ {
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
periph_clk: periph_clk {
compatible = "fixed-factor-clock";
clocks = <&clkgen CPU_CLK>;
clock-mult = <1>;
clock-div = <2>;
#clock-cells = <0>;
};
mpcore {
compatible = "simple-bus";
ranges = <0x00000000 0x20000000 0x2000>;
#address-cells = <1>;
#size-cells = <1>;
scu@0 {
compatible = "arm,cortex-a9-scu";
reg = <0x0 0x100>;
};
twd@600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x600 0x10>;
interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
clocks = <&periph_clk>;
always-on;
};
gic: interrupt-controller@1000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x1000 0x1000>, <0x100 0x100>;
};
};
l2cc: cache-controller@20100000 {
compatible = "arm,pl310-cache";
reg = <0x20100000 0x1000>;
cache-level = <2>;
cache-unified;
};
soc {
compatible = "simple-bus";
interrupt-parent = <&irq0>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
xtal: xtal {
compatible = "fixed-clock";
clock-frequency = <27000000>;
#clock-cells = <0>;
};
clkgen: clkgen@10000 {
compatible = "sigma,tango4-clkgen";
reg = <0x10000 0x100>;
clocks = <&xtal>;
#clock-cells = <1>;
};
tick-counter@10048 {
compatible = "sigma,tick-counter";
reg = <0x10048 0x4>;
clocks = <&xtal>;
};
uart: serial@10700 {
compatible = "ralink,rt2880-uart", "ns16550a";
reg = <0x10700 0x30>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <7372800>;
reg-shift = <2>;
};
watchdog@1fd00 {
compatible = "sigma,smp8759-wdt";
reg = <0x1fd00 8>;
clocks = <&xtal>;
};
mmc0: mmc@21000 {
compatible = "arasan,sdhci-8.9a";
reg = <0x21000 0x200>;
clock-names = "clk_xin", "clk_ahb";
clocks = <&clkgen SDIO_CLK>, <&clkgen SYS_CLK>;
interrupts = <60 IRQ_TYPE_LEVEL_HIGH>;
};
mmc1: mmc@21200 {
compatible = "arasan,sdhci-8.9a";
reg = <0x21200 0x200>;
clock-names = "clk_xin", "clk_ahb";
clocks = <&clkgen SDIO_CLK>, <&clkgen SYS_CLK>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
};
usb0: usb@21400 {
compatible = "chipidea,usb2";
reg = <0x21400 0x200>;
interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb0_phy>;
phy-names = "usb-phy";
};
usb0_phy: phy@21700 {
compatible = "sigma,smp8642-usb-phy";
reg = <0x21700 0x100>;
#phy-cells = <0>;
clocks = <&clkgen USB_CLK>;
};
usb1: usb@25400 {
compatible = "chipidea,usb2";
reg = <0x25400 0x200>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb1_phy>;
phy-names = "usb-phy";
};
usb1_phy: phy@25700 {
compatible = "sigma,smp8642-usb-phy";
reg = <0x25700 0x100>;
#phy-cells = <0>;
clocks = <&clkgen USB_CLK>;
};
eth0: ethernet@26000 {
compatible = "sigma,smp8734-ethernet";
reg = <0x26000 0x800>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkgen SYS_CLK>;
};
intc: interrupt-controller@6e000 {
compatible = "sigma,smp8642-intc";
reg = <0x6e000 0x400>;
ranges = <0 0x6e000 0x400>;
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
irq0: irq0@0 {
reg = <0x000 0x100>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
};
irq1: irq1@100 {
reg = <0x100 0x100>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
};
irq2: irq2@300 {
reg = <0x300 0x100>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
};
// SPDX-License-Identifier: GPL-2.0
#include "tango4-common.dtsi"
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "sigma,tango4-smp";
cpu0: cpu@0 {
compatible = "arm,cortex-a9";
next-level-cache = <&l2cc>;
device_type = "cpu";
reg = <0>;
clocks = <&clkgen CPU_CLK>;
clock-latency = <1>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a9";
next-level-cache = <&l2cc>;
device_type = "cpu";
reg = <1>;
};
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-affinity = <&cpu0>, <&cpu1>;
interrupts =
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
};
soc {
cpu_temp: thermal@920100 {
#thermal-sensor-cells = <0>;
compatible = "sigma,smp8758-thermal";
reg = <0x920100 12>;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay = <997>; /* milliseconds */
polling-delay-passive = <499>; /* milliseconds */
thermal-sensors = <&cpu_temp>;
trips {
cpu_critical {
temperature = <120000>;
hysteresis = <2500>;
type = "critical";
};
};
};
};
};
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tango4-smp8758.dtsi"
/ {
model = "Sigma Designs SMP8758 Vantage-1172 Rev E1";
compatible = "sigma,vantage-1172", "sigma,smp8758", "sigma,tango4";
aliases {
serial = &uart;
eth0 = &eth0;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x80000000>; /* 2 GB */
};
chosen {
stdout-path = "serial:115200n8";
};
};
&eth0 {
phy-connection-type = "rgmii-id";
phy-handle = <&eth0_phy>;
#address-cells = <1>;
#size-cells = <0>;
/* Atheros AR8035 */
eth0_phy: ethernet-phy@4 {
compatible = "ethernet-phy-id004d.d072",
"ethernet-phy-ieee802.3-c22";
interrupts = <37 IRQ_TYPE_EDGE_RISING>;
reg = <4>;
};
};
&mmc1 {
non-removable; /* eMMC */
};
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_ARCH_TANGO=y
# CONFIG_ARM_ERRATA_643719 is not set
CONFIG_SMP=y
CONFIG_PREEMPT=y
CONFIG_HZ_300=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
# CONFIG_ATAGS is not set
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPUFREQ_DT=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_IPV6 is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_TANGO=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
CONFIG_NET_VENDOR_AURORA=y
CONFIG_AURORA_NB8800=y
CONFIG_AT803X_PHY=y
# CONFIG_WLAN is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_8250=y
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_RT288X=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_XLR=y
CONFIG_GPIOLIB=y
CONFIG_THERMAL=y
CONFIG_CPU_THERMAL=y
CONFIG_TANGO_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_TANGOX_WATCHDOG=y
CONFIG_FB=y
# CONFIG_HID is not set
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_OF_ARASAN=y
CONFIG_DMADEVICES=y
CONFIG_EXT4_FS=y
CONFIG_FUSE_FS=m
CONFIG_VFAT_FS=m
CONFIG_TMPFS=y
CONFIG_NFS_FS=y
# CONFIG_NFS_V2 is not set
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_UTF8=m
CONFIG_PRINTK_TIME=y
# CONFIG_CRYPTO_ECHAINIV is not set
# SPDX-License-Identifier: GPL-2.0
config ARCH_TANGO
bool "Sigma Designs Tango4 (SMP87xx)"
depends on ARCH_MULTI_V7
# Cortex-A9 MPCore r3p0, PL310 r3p2
select ARM_ERRATA_754322
select ARM_ERRATA_764369 if SMP
select ARM_ERRATA_775420
select ARM_GIC
select CLKSRC_TANGO_XTAL
select HAVE_ARM_SCU
select HAVE_ARM_TWD
select TANGO_IRQ
# SPDX-License-Identifier: GPL-2.0
obj-y += setup.o smc.o
obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_SUSPEND) += pm.o
// SPDX-License-Identifier: GPL-2.0
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/smp.h>
#include "smc.h"
static int tango_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
tango_set_aux_boot_addr(__pa_symbol(secondary_startup));
tango_start_aux_core(cpu);
return 0;
}
#ifdef CONFIG_HOTPLUG_CPU
/*
* cpu_kill() and cpu_die() run concurrently on different cores.
* Firmware will only "kill" a core once it has properly "died".
* Try a few times to kill a core before giving up, and sleep
* between tries to give that core enough time to die.
*/
static int tango_cpu_kill(unsigned int cpu)
{
int i, err;
for (i = 0; i < 10; ++i) {
msleep(10);
err = tango_aux_core_kill(cpu);
if (!err)
return true;
}
return false;
}
static void tango_cpu_die(unsigned int cpu)
{
while (tango_aux_core_die(cpu) < 0)
cpu_relax();
panic("cpu %d failed to die\n", cpu);
}
#endif
static const struct smp_operations tango_smp_ops __initconst = {
.smp_boot_secondary = tango_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_kill = tango_cpu_kill,
.cpu_die = tango_cpu_die,
#endif
};
CPU_METHOD_OF_DECLARE(tango4_smp, "sigma,tango4-smp", &tango_smp_ops);
// SPDX-License-Identifier: GPL-2.0
#include <linux/init.h>
#include <linux/suspend.h>
#include <asm/suspend.h>
#include "smc.h"
#include "pm.h"
static int tango_pm_powerdown(unsigned long arg)
{
tango_suspend(__pa_symbol(cpu_resume));
return -EIO; /* tango_suspend has failed */
}
static int tango_pm_enter(suspend_state_t state)
{
if (state == PM_SUSPEND_MEM)
return cpu_suspend(0, tango_pm_powerdown);
return -EINVAL;
}
static const struct platform_suspend_ops tango_pm_ops = {
.enter = tango_pm_enter,
.valid = suspend_valid_only_mem,
};
void __init tango_pm_init(void)
{
suspend_set_ops(&tango_pm_ops);
}
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_SUSPEND
void __init tango_pm_init(void);
#else
#define tango_pm_init NULL
#endif
// SPDX-License-Identifier: GPL-2.0
#include <asm/mach/arch.h>
#include <asm/hardware/cache-l2x0.h>
#include "smc.h"
#include "pm.h"
static void tango_l2c_write(unsigned long val, unsigned int reg)
{
if (reg == L2X0_CTRL)
tango_set_l2_control(val);
}
static const char *const tango_dt_compat[] = { "sigma,tango4", NULL };
DT_MACHINE_START(TANGO_DT, "Sigma Tango DT")
.dt_compat = tango_dt_compat,
.l2c_aux_mask = ~0,
.l2c_write_sec = tango_l2c_write,
.init_late = tango_pm_init,
MACHINE_END
/* SPDX-License-Identifier: GPL-2.0 */
#include <linux/linkage.h>
.arch armv7-a
.arch_extension sec
ENTRY(tango_smc)
push {lr}
mov ip, r1
dsb /* This barrier is probably unnecessary */
smc #0
pop {pc}
ENDPROC(tango_smc)
/* SPDX-License-Identifier: GPL-2.0 */
extern int tango_smc(unsigned int val, unsigned int service);
#define tango_set_l2_control(val) tango_smc(val, 0x102)
#define tango_start_aux_core(val) tango_smc(val, 0x104)
#define tango_set_aux_boot_addr(val) tango_smc(val, 0x105)
#define tango_suspend(val) tango_smc(val, 0x120)
#define tango_aux_core_die(val) tango_smc(val, 0x121)
#define tango_aux_core_kill(val) tango_smc(val, 0x122)
...@@ -1174,8 +1174,8 @@ config I2C_XILINX ...@@ -1174,8 +1174,8 @@ config I2C_XILINX
will be called xilinx_i2c. will be called xilinx_i2c.
config I2C_XLR config I2C_XLR
tristate "Netlogic XLR and Sigma Designs I2C support" tristate "Netlogic XLR I2C support"
depends on CPU_XLR || ARCH_TANGO || COMPILE_TEST depends on CPU_XLR || COMPILE_TEST
help help
This driver enables support for the on-chip I2C interface of This driver enables support for the on-chip I2C interface of
the Netlogic XLR/XLS MIPS processors and Sigma Designs SOCs. the Netlogic XLR/XLS MIPS processors and Sigma Designs SOCs.
......
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