提交 edb81706 编写于 作者: Y Yang Qiang 提交者: guzitao

sw64: pci: fix maximum bus number for pci scan

Sunway inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I5GDR1

--------------------------------

When PCI devices enable SRIOV function, the previous policy that uses
pci_find_bus to locate PCI bus from a given domain and bus number may
return false PCI bus number, so this patch fixes this patch.
Signed-off-by: NYang Qiang <yangqiang@wxiat.com>
Signed-off-by: NGu Zitao <guzitao@wxiat.com>
上级 2d3b928e
......@@ -178,18 +178,20 @@ int chip_pcie_configure(struct pci_controller *hose)
struct pci_bus *bus, *top;
struct list_head *next;
unsigned int max_read_size, smallest_max_payload;
int max_payloadsize, iov_bus = 0;
int max_payloadsize;
unsigned long rc_index, node;
unsigned long piuconfig0, value;
unsigned int pcie_caps_offset;
unsigned int rc_conf_value;
u16 devctl, new_values;
bool rc_ari_disabled = false, found = false;
unsigned char bus_max_num;
node = hose->node;
rc_index = hose->index;
smallest_max_payload = read_rc_conf(node, rc_index, RC_EXP_DEVCAP);
smallest_max_payload &= PCI_EXP_DEVCAP_PAYLOAD;
bus_max_num = hose->busn_space->start;
top = hose->bus;
bus = top;
......@@ -200,6 +202,7 @@ int chip_pcie_configure(struct pci_controller *hose)
/* end of this bus, go up or finish */
if (bus == top)
break;
next = bus->self->bus_list.next;
bus = bus->self->bus;
continue;
......@@ -224,10 +227,8 @@ int chip_pcie_configure(struct pci_controller *hose)
}
}
#ifdef CONFIG_PCI_IOV
if (dev->is_physfn)
iov_bus += dev->sriov->max_VF_buses - dev->bus->number;
#endif
if (bus->busn_res.end > bus_max_num)
bus_max_num = bus->busn_res.end;
/* Query device PCIe capability register */
pcie_caps_offset = dev->pcie_cap;
......@@ -306,7 +307,7 @@ int chip_pcie_configure(struct pci_controller *hose)
pci_write_config_word(dev, pcie_caps_offset + PCI_EXP_DEVCTL, devctl);
}
return iov_bus;
return bus_max_num;
}
static int chip3_check_pci_vt_linkup(unsigned long node, unsigned long index)
......
......@@ -221,7 +221,7 @@ void __init common_init_pci(void)
struct pci_bus *bus;
unsigned int init_busnr;
int need_domain_info = 0;
int ret, iov_bus;
int ret;
unsigned long offset;
/* Scan all of the recorded PCI controllers. */
......@@ -257,20 +257,20 @@ void __init common_init_pci(void)
bus = hose->bus = bridge->bus;
hose->need_domain_info = need_domain_info;
while (pci_find_bus(pci_domain_nr(bus), last_bus))
last_bus++;
if (is_in_host())
iov_bus = chip_pcie_configure(hose);
last_bus += iov_bus;
last_bus = chip_pcie_configure(hose);
else
while (pci_find_bus(pci_domain_nr(bus), last_bus))
last_bus++;
hose->last_busno = hose->busn_space->end = last_bus - 1;
hose->last_busno = hose->busn_space->end = last_bus;
init_busnr = read_rc_conf(hose->node, hose->index, RC_PRIMARY_BUS);
init_busnr &= ~(0xff << 16);
init_busnr |= (last_bus - 1) << 16;
init_busnr |= last_bus << 16;
write_rc_conf(hose->node, hose->index, RC_PRIMARY_BUS, init_busnr);
pci_bus_update_busn_res_end(bus, last_bus - 1);
pci_bus_update_busn_res_end(bus, last_bus);
last_bus++;
}
pcibios_claim_console_setup();
......
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