提交 eda58a85 编写于 作者: L Linus Torvalds

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (40 commits)
  Blackfin arch: Remove outdated code
  Blackfin arch: Fix udelay implementation
  Blackfin arch: Update Copyright information
  Blackfin arch: Add BF561 PPI POLS, POLC Masks
  Blackfin arch: Update CM-BF527 kernel config
  Blackfin arch: define bfin_memmap as static since it is only used here
  Blackfin arch: cplb mananger: use a do...while loop rather than a for loop
  Blackfin arch: fix bug - traps test case 19 for exception 0x2d fails
  Blackfin arch: add platform device bfin_mii-bus and KSZ8893M switch driver platform resources to board files
  Blackfin arch: build jtag tty driver as a module by default
  Blackfin arch: fix 2 bugs related to debug
  Blackfin arch: Add ANOMALY_05000380 to BF54x to kill the compile warning
  Blackfin arch: Fix bug - 561 SMP kernel can't boot from jffs2
  Blackfin arch: base SIC_IWR# programming on whether the MMR exists
  Blackfin arch: read SYSCR on newer parts that mirror the bits of SWRST in it
  Blackfin arch: fixup board init function name
  Blackfin arch: drop CONFIG_I2C_BOARDINFO ifdefs
  Blackfin arch: bfin_reset->_bfin_reset redirection no longer needed
  Blackfin arch: sync reboot handler with version in u-boot
  Blackfin arch: Faster Implementation of csum_tcpudp_nofold()
  ...
......@@ -911,7 +911,7 @@ S: Maintained
BLACKFIN ARCHITECTURE
P: Bryan Wu
M: cooloney@kernel.org
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
L: uclinux-dist-devel@blackfin.uclinux.org
W: http://blackfin.uclinux.org
S: Supported
......
......@@ -169,26 +169,51 @@ config BF542
help
BF542 Processor Support.
config BF542M
bool "BF542m"
help
BF542 Processor Support.
config BF544
bool "BF544"
help
BF544 Processor Support.
config BF544M
bool "BF544m"
help
BF544 Processor Support.
config BF547
bool "BF547"
help
BF547 Processor Support.
config BF547M
bool "BF547m"
help
BF547 Processor Support.
config BF548
bool "BF548"
help
BF548 Processor Support.
config BF548M
bool "BF548m"
help
BF548 Processor Support.
config BF549
bool "BF549"
help
BF549 Processor Support.
config BF549M
bool "BF549m"
help
BF549 Processor Support.
config BF561
bool "BF561"
help
......@@ -224,39 +249,39 @@ config TICK_SOURCE_SYSTMR0
config BF_REV_MIN
int
default 0 if (BF51x || BF52x || BF54x)
default 0 if (BF51x || BF52x || (BF54x && !BF54xM))
default 2 if (BF537 || BF536 || BF534)
default 3 if (BF561 ||BF533 || BF532 || BF531)
default 3 if (BF561 || BF533 || BF532 || BF531 || BF54xM)
default 4 if (BF538 || BF539)
config BF_REV_MAX
int
default 2 if (BF51x || BF52x || BF54x)
default 3 if (BF537 || BF536 || BF534)
default 2 if (BF51x || BF52x || (BF54x && !BF54xM))
default 3 if (BF537 || BF536 || BF534 || BF54xM)
default 5 if (BF561 || BF538 || BF539)
default 6 if (BF533 || BF532 || BF531)
choice
prompt "Silicon Rev"
default BF_REV_0_1 if (BF51x || BF52x || BF54x)
default BF_REV_0_1 if (BF51x || BF52x || (BF54x && !BF54xM))
default BF_REV_0_2 if (BF534 || BF536 || BF537)
default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF561)
default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF54xM || BF561)
config BF_REV_0_0
bool "0.0"
depends on (BF51x || BF52x || BF54x)
depends on (BF51x || BF52x || (BF54x && !BF54xM))
config BF_REV_0_1
bool "0.1"
depends on (BF52x || BF54x)
depends on (BF52x || (BF54x && !BF54xM))
config BF_REV_0_2
bool "0.2"
depends on (BF52x || BF537 || BF536 || BF534 || BF54x)
depends on (BF52x || BF537 || BF536 || BF534 || (BF54x && !BF54xM))
config BF_REV_0_3
bool "0.3"
depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
depends on (BF54xM || BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
config BF_REV_0_4
bool "0.4"
......@@ -293,9 +318,14 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
config BF54xM
bool
depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
default y
config BF54x
bool
depends on (BF542 || BF544 || BF547 || BF548 || BF549)
depends on (BF542 || BF544 || BF547 || BF548 || BF549 || BF54xM)
default y
config MEM_GENERIC_BOARD
......
......@@ -21,57 +21,67 @@ KALLSYMS += --symbol-prefix=_
KBUILD_DEFCONFIG := BF537-STAMP_defconfig
# setup the machine name and the machine dependent settings
machine-$(CONFIG_BF512) := bf518
machine-$(CONFIG_BF514) := bf518
machine-$(CONFIG_BF516) := bf518
machine-$(CONFIG_BF518) := bf518
machine-$(CONFIG_BF522) := bf527
machine-$(CONFIG_BF523) := bf527
machine-$(CONFIG_BF524) := bf527
machine-$(CONFIG_BF525) := bf527
machine-$(CONFIG_BF526) := bf527
machine-$(CONFIG_BF527) := bf527
machine-$(CONFIG_BF531) := bf533
machine-$(CONFIG_BF532) := bf533
machine-$(CONFIG_BF533) := bf533
machine-$(CONFIG_BF534) := bf537
machine-$(CONFIG_BF536) := bf537
machine-$(CONFIG_BF537) := bf537
machine-$(CONFIG_BF538) := bf538
machine-$(CONFIG_BF539) := bf538
machine-$(CONFIG_BF542) := bf548
machine-$(CONFIG_BF544) := bf548
machine-$(CONFIG_BF547) := bf548
machine-$(CONFIG_BF548) := bf548
machine-$(CONFIG_BF549) := bf548
machine-$(CONFIG_BF561) := bf561
machine-$(CONFIG_BF512) := bf518
machine-$(CONFIG_BF514) := bf518
machine-$(CONFIG_BF516) := bf518
machine-$(CONFIG_BF518) := bf518
machine-$(CONFIG_BF522) := bf527
machine-$(CONFIG_BF523) := bf527
machine-$(CONFIG_BF524) := bf527
machine-$(CONFIG_BF525) := bf527
machine-$(CONFIG_BF526) := bf527
machine-$(CONFIG_BF527) := bf527
machine-$(CONFIG_BF531) := bf533
machine-$(CONFIG_BF532) := bf533
machine-$(CONFIG_BF533) := bf533
machine-$(CONFIG_BF534) := bf537
machine-$(CONFIG_BF536) := bf537
machine-$(CONFIG_BF537) := bf537
machine-$(CONFIG_BF538) := bf538
machine-$(CONFIG_BF539) := bf538
machine-$(CONFIG_BF542) := bf548
machine-$(CONFIG_BF542M) := bf548
machine-$(CONFIG_BF544) := bf548
machine-$(CONFIG_BF544M) := bf548
machine-$(CONFIG_BF547) := bf548
machine-$(CONFIG_BF547M) := bf548
machine-$(CONFIG_BF548) := bf548
machine-$(CONFIG_BF548M) := bf548
machine-$(CONFIG_BF549) := bf548
machine-$(CONFIG_BF549M) := bf548
machine-$(CONFIG_BF561) := bf561
MACHINE := $(machine-y)
export MACHINE
cpu-$(CONFIG_BF512) := bf512
cpu-$(CONFIG_BF514) := bf514
cpu-$(CONFIG_BF516) := bf516
cpu-$(CONFIG_BF518) := bf518
cpu-$(CONFIG_BF522) := bf522
cpu-$(CONFIG_BF523) := bf523
cpu-$(CONFIG_BF524) := bf524
cpu-$(CONFIG_BF525) := bf525
cpu-$(CONFIG_BF526) := bf526
cpu-$(CONFIG_BF527) := bf527
cpu-$(CONFIG_BF531) := bf531
cpu-$(CONFIG_BF532) := bf532
cpu-$(CONFIG_BF533) := bf533
cpu-$(CONFIG_BF534) := bf534
cpu-$(CONFIG_BF536) := bf536
cpu-$(CONFIG_BF537) := bf537
cpu-$(CONFIG_BF538) := bf538
cpu-$(CONFIG_BF539) := bf539
cpu-$(CONFIG_BF542) := bf542
cpu-$(CONFIG_BF544) := bf544
cpu-$(CONFIG_BF547) := bf547
cpu-$(CONFIG_BF548) := bf548
cpu-$(CONFIG_BF549) := bf549
cpu-$(CONFIG_BF561) := bf561
cpu-$(CONFIG_BF512) := bf512
cpu-$(CONFIG_BF514) := bf514
cpu-$(CONFIG_BF516) := bf516
cpu-$(CONFIG_BF518) := bf518
cpu-$(CONFIG_BF522) := bf522
cpu-$(CONFIG_BF523) := bf523
cpu-$(CONFIG_BF524) := bf524
cpu-$(CONFIG_BF525) := bf525
cpu-$(CONFIG_BF526) := bf526
cpu-$(CONFIG_BF527) := bf527
cpu-$(CONFIG_BF531) := bf531
cpu-$(CONFIG_BF532) := bf532
cpu-$(CONFIG_BF533) := bf533
cpu-$(CONFIG_BF534) := bf534
cpu-$(CONFIG_BF536) := bf536
cpu-$(CONFIG_BF537) := bf537
cpu-$(CONFIG_BF538) := bf538
cpu-$(CONFIG_BF539) := bf539
cpu-$(CONFIG_BF542) := bf542
cpu-$(CONFIG_BF542M) := bf542m
cpu-$(CONFIG_BF544) := bf544
cpu-$(CONFIG_BF544M) := bf544m
cpu-$(CONFIG_BF547) := bf547
cpu-$(CONFIG_BF547M) := bf547m
cpu-$(CONFIG_BF548) := bf548
cpu-$(CONFIG_BF548M) := bf548m
cpu-$(CONFIG_BF549) := bf549
cpu-$(CONFIG_BF549M) := bf549m
cpu-$(CONFIG_BF561) := bf561
rev-$(CONFIG_BF_REV_0_0) := 0.0
rev-$(CONFIG_BF_REV_0_1) := 0.1
......
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.28-rc2
# Fri Jan 9 17:58:41 2009
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
......@@ -149,6 +150,7 @@ CONFIG_BF_REV_0_0=y
# CONFIG_BF_REV_ANY is not set
# CONFIG_BF_REV_NONE is not set
CONFIG_BF51x=y
CONFIG_MEM_MT48LC32M8A2_75=y
CONFIG_BFIN518F_EZBRD=y
#
......@@ -598,7 +600,10 @@ CONFIG_PHYLIB=y
# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_BFIN_MAC is not set
CONFIG_BFIN_MAC=y
CONFIG_BFIN_TX_DESC_NUM=10
CONFIG_BFIN_RX_DESC_NUM=20
# CONFIG_BFIN_MAC_RMII is not set
# CONFIG_SMC91X is not set
# CONFIG_SMSC911X is not set
# CONFIG_DM9000 is not set
......@@ -679,7 +684,7 @@ CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
......
......@@ -723,7 +723,7 @@ CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
......
......@@ -767,7 +767,7 @@ CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
......
......@@ -672,7 +672,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
......
......@@ -679,7 +679,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
......
......@@ -722,7 +722,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
......
......@@ -726,7 +726,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
......
......@@ -856,7 +856,7 @@ CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
......
......@@ -709,7 +709,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
......
......@@ -63,23 +63,23 @@ static inline __wsum
csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
unsigned short proto, __wsum sum)
{
__asm__ ("%0 = %0 + %1;\n\t"
"CC = AC0;\n\t"
"if !CC jump 4;\n\t"
"%0 = %0 + %4;\n\t"
"%0 = %0 + %2;\n\t"
"CC = AC0;\n\t"
"if !CC jump 4;\n\t"
"%0 = %0 + %4;\n\t"
"%0 = %0 + %3;\n\t"
"CC = AC0;\n\t"
"if !CC jump 4;\n\t"
"%0 = %0 + %4;\n\t"
"NOP;\n\t"
: "=d" (sum)
: "d" (daddr), "d" (saddr), "d" ((ntohs(len)<<16)+proto*256), "d" (1), "0"(sum)
: "CC");
unsigned int carry;
__asm__ ("%0 = %0 + %2;\n\t"
"CC = AC0;\n\t"
"%1 = CC;\n\t"
"%0 = %0 + %1;\n\t"
"%0 = %0 + %3;\n\t"
"CC = AC0;\n\t"
"%1 = CC;\n\t"
"%0 = %0 + %1;\n\t"
"%0 = %0 + %4;\n\t"
"CC = AC0;\n\t"
"%1 = CC;\n\t"
"%0 = %0 + %1;\n\t"
: "=d" (sum), "=&d" (carry)
: "d" (daddr), "d" (saddr), "d" ((len + proto) << 8), "0"(sum)
: "CC");
return (sum);
}
......
......@@ -13,29 +13,7 @@
static inline void __delay(unsigned long loops)
{
if (ANOMALY_05000312) {
/* Interrupted loads to loop registers -> bad */
unsigned long tmp;
__asm__ __volatile__(
"[--SP] = LC0;"
"[--SP] = LT0;"
"[--SP] = LB0;"
"LSETUP (1f,1f) LC0 = %1;"
"1: NOP;"
/* We take advantage of the fact that LC0 is 0 at
* the end of the loop. Otherwise we'd need some
* NOPs after the CLI here.
*/
"CLI %0;"
"LB0 = [SP++];"
"LT0 = [SP++];"
"LC0 = [SP++];"
"STI %0;"
: "=d" (tmp)
: "a" (loops)
);
} else
__asm__ __volatile__ (
__asm__ __volatile__ (
"LSETUP(1f, 1f) LC0 = %0;"
"1: NOP;"
:
......@@ -47,16 +25,15 @@ static inline void __delay(unsigned long loops)
#include <linux/param.h> /* needed for HZ */
/*
* Use only for very small delays ( < 1 msec). Should probably use a
* lookup table, really, as the multiplications take much too long with
* short delays. This is a "reasonable" implementation, though (and the
* first constant multiplications gets optimized away if the delay is
* a constant)
* close approximation borrowed from m68knommu to avoid 64-bit math
*/
#define HZSCALE (268435456 / (1000000/HZ))
static inline void udelay(unsigned long usecs)
{
extern unsigned long loops_per_jiffy;
__delay(usecs * loops_per_jiffy / (1000000 / HZ));
__delay((((usecs * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6);
}
#endif
......@@ -27,60 +27,6 @@
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/*
* Number BF537/6/4 BF561 BF533/2/1
* BF527/5/2
*
* GPIO_0 PF0 PF0 PF0
* GPIO_1 PF1 PF1 PF1
* GPIO_2 PF2 PF2 PF2
* GPIO_3 PF3 PF3 PF3
* GPIO_4 PF4 PF4 PF4
* GPIO_5 PF5 PF5 PF5
* GPIO_6 PF6 PF6 PF6
* GPIO_7 PF7 PF7 PF7
* GPIO_8 PF8 PF8 PF8
* GPIO_9 PF9 PF9 PF9
* GPIO_10 PF10 PF10 PF10
* GPIO_11 PF11 PF11 PF11
* GPIO_12 PF12 PF12 PF12
* GPIO_13 PF13 PF13 PF13
* GPIO_14 PF14 PF14 PF14
* GPIO_15 PF15 PF15 PF15
* GPIO_16 PG0 PF16
* GPIO_17 PG1 PF17
* GPIO_18 PG2 PF18
* GPIO_19 PG3 PF19
* GPIO_20 PG4 PF20
* GPIO_21 PG5 PF21
* GPIO_22 PG6 PF22
* GPIO_23 PG7 PF23
* GPIO_24 PG8 PF24
* GPIO_25 PG9 PF25
* GPIO_26 PG10 PF26
* GPIO_27 PG11 PF27
* GPIO_28 PG12 PF28
* GPIO_29 PG13 PF29
* GPIO_30 PG14 PF30
* GPIO_31 PG15 PF31
* GPIO_32 PH0 PF32
* GPIO_33 PH1 PF33
* GPIO_34 PH2 PF34
* GPIO_35 PH3 PF35
* GPIO_36 PH4 PF36
* GPIO_37 PH5 PF37
* GPIO_38 PH6 PF38
* GPIO_39 PH7 PF39
* GPIO_40 PH8 PF40
* GPIO_41 PH9 PF41
* GPIO_42 PH10 PF42
* GPIO_43 PH11 PF43
* GPIO_44 PH12 PF44
* GPIO_45 PH13 PF45
* GPIO_46 PH14 PF46
* GPIO_47 PH15 PF47
*/
#ifndef __ARCH_BLACKFIN_GPIO_H__
#define __ARCH_BLACKFIN_GPIO_H__
......@@ -295,10 +241,6 @@ int bfin_gpio_direction_output(unsigned gpio, int value);
int bfin_gpio_get_value(unsigned gpio);
void bfin_gpio_set_value(unsigned gpio, int value);
#ifndef BF548_FAMILY
#define bfin_gpio_set_value(gpio, value) set_gpio_data(gpio, value)
#endif
#ifdef CONFIG_GPIOLIB
#include <asm-generic/gpio.h> /* cansleep wrappers */
......
/*
* File: include/asm-blackfin/kgdb.h
* Based on:
* Author: Sonic Zhang
*
* Created:
* Description:
*
* Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
*
* Modified:
* Copyright 2005-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
/* Blackfin KGDB header
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* Copyright 2005-2009 Analog Devices Inc.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
* Licensed under the GPL-2 or later.
*/
#ifndef __ASM_BLACKFIN_KGDB_H__
......@@ -37,17 +13,18 @@
/* gdb locks */
#define KGDB_MAX_NO_CPUS 8
/************************************************************************/
/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/
/* at least NUMREGBYTES*2 are needed for register packets */
/* Longer buffer is needed to list all threads */
/*
* BUFMAX defines the maximum number of characters in inbound/outbound buffers.
* At least NUMREGBYTES*2 are needed for register packets.
* Longer buffer is needed to list all threads.
*/
#define BUFMAX 2048
/*
* Note that this register image is different from
* the register image that Linux produces at interrupt time.
*
* Linux's register image is defined by struct pt_regs in ptrace.h.
* Note that this register image is different from
* the register image that Linux produces at interrupt time.
*
* Linux's register image is defined by struct pt_regs in ptrace.h.
*/
enum regnames {
/* Core Registers */
......@@ -104,14 +81,14 @@ enum regnames {
BFIN_RETX,
BFIN_RETN,
BFIN_RETE,
/* Pseudo Registers */
BFIN_PC,
BFIN_CC,
BFIN_EXTRA1, /* Address of .text section. */
BFIN_EXTRA2, /* Address of .data section. */
BFIN_EXTRA3, /* Address of .bss section. */
BFIN_FDPIC_EXEC,
BFIN_FDPIC_EXEC,
BFIN_FDPIC_INTERP,
/* MMRs */
......@@ -126,7 +103,7 @@ enum regnames {
static inline void arch_kgdb_breakpoint(void)
{
asm(" EXCPT 2;");
asm("EXCPT 2;");
}
#define BREAK_INSTR_SIZE 2
#define CACHE_FLUSH_IS_SAFE 1
......
......@@ -115,7 +115,7 @@
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
/* Enable SCLK Out */
#define mem_SDGCTL (0x80000000 | SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
#define mem_SDGCTL (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
#else
#define mem_SDRRC CONFIG_MEM_SDRRC
#define mem_SDGCTL CONFIG_MEM_SDGCTL
......
......@@ -59,6 +59,7 @@ struct blackfin_pda { /* Per-processor Data Area */
unsigned long icplb_fault_addr;
unsigned long retx;
unsigned long seqstat;
unsigned int __nmi_count; /* number of times NMI asserted on this CPU */
};
extern struct blackfin_pda cpu_pda[];
......
......@@ -15,6 +15,6 @@ extern void native_machine_halt(void);
extern void native_machine_power_off(void);
/* common reboot workarounds */
extern void bfin_gpio_reset_spi0_ssel1(void);
extern void bfin_reset_boot_spi_cs(unsigned short pin);
#endif
......@@ -15,6 +15,8 @@ else
obj-y += time.o
endif
CFLAGS_kgdb_test.o := -mlong-calls -O0
obj-$(CONFIG_IPIPE) += ipipe.o
obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
......
......@@ -249,6 +249,13 @@ static void __dma_memcpy(u32 daddr, s16 dmod, u32 saddr, s16 smod, size_t cnt, u
spin_lock_irqsave(&mdma_lock, flags);
/* Force a sync in case a previous config reset on this channel
* occurred. This is needed so subsequent writes to DMA registers
* are not spuriously lost/corrupted. Do it under irq lock and
* without the anomaly version (because we are atomic already).
*/
__builtin_bfin_ssync();
if (bfin_read_MDMA_S0_CONFIG())
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
continue;
......
此差异已折叠。
......@@ -63,10 +63,8 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
dcplb_tbl[cpu][i_d].addr = 0;
dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
#if 0
icplb_tbl[cpu][i_i].addr = 0;
icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB;
#endif
icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB;
/* Cover kernel memory with 4M pages. */
addr = 0;
......
......@@ -163,12 +163,14 @@ MGR_ATTR static int icplb_miss(int cpu)
nr_icplb_supv_miss[cpu]++;
base = 0;
for (idx = 0; idx < icplb_nr_bounds; idx++) {
idx = 0;
do {
eaddr = icplb_bounds[idx].eaddr;
if (addr < eaddr)
break;
base = eaddr;
}
} while (++idx < icplb_nr_bounds);
if (unlikely(idx == icplb_nr_bounds))
return CPLB_NO_ADDR_MATCH;
......@@ -208,12 +210,14 @@ MGR_ATTR static int dcplb_miss(int cpu)
nr_dcplb_supv_miss[cpu]++;
base = 0;
for (idx = 0; idx < dcplb_nr_bounds; idx++) {
idx = 0;
do {
eaddr = dcplb_bounds[idx].eaddr;
if (addr < eaddr)
break;
base = eaddr;
}
} while (++idx < dcplb_nr_bounds);
if (unlikely(idx == dcplb_nr_bounds))
return CPLB_NO_ADDR_MATCH;
......
......@@ -35,6 +35,7 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/trace.h>
#include <asm/pda.h>
static atomic_t irq_err_count;
static spinlock_t irq_controller_lock;
......@@ -91,8 +92,13 @@ int show_interrupts(struct seq_file *p, void *v)
seq_putc(p, '\n');
skip:
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
} else if (i == NR_IRQS)
} else if (i == NR_IRQS) {
seq_printf(p, "NMI: ");
for_each_online_cpu(j)
seq_printf(p, "%10u ", cpu_pda[j].__nmi_count);
seq_printf(p, " CORE Non Maskable Interrupt\n");
seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
}
return 0;
}
......
......@@ -20,8 +20,8 @@
* reset while the Core B bit (on dual core parts) is cleared by
* the core reset.
*/
__attribute__((l1_text))
static void _bfin_reset(void)
__attribute__ ((__l1_text__, __noreturn__))
static void bfin_reset(void)
{
/* Wait for completion of "system" events such as cache line
* line fills so that we avoid infinite stalls later on as
......@@ -30,7 +30,11 @@ static void _bfin_reset(void)
*/
__builtin_bfin_ssync();
while (1) {
/* The bootrom checks to see how it was reset and will
* automatically perform a software reset for us when
* it starts executing after the core reset.
*/
if (ANOMALY_05000353 || ANOMALY_05000386) {
/* Initiate System software reset. */
bfin_write_SWRST(0x7);
......@@ -50,6 +54,11 @@ static void _bfin_reset(void)
/* Clear System software reset */
bfin_write_SWRST(0);
/* The BF526 ROM will crash during reset */
#if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
bfin_read_SWRST();
#endif
/* Wait for the SWRST write to complete. Cannot rely on SSYNC
* though as the System state is all reset now.
*/
......@@ -60,22 +69,11 @@ static void _bfin_reset(void)
: "a" (15 * 1)
: "LC1", "LB1", "LT1"
);
}
while (1)
/* Issue core reset */
asm("raise 1");
}
}
static void bfin_reset(void)
{
if (ANOMALY_05000353 || ANOMALY_05000386)
_bfin_reset();
else
/* the bootrom checks to see how it was reset and will
* automatically perform a software reset for us when
* it starts executing boot
*/
asm("raise 1;");
}
__attribute__((weak))
......
......@@ -60,7 +60,7 @@ void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
#define BFIN_MEMMAP_RAM 1
#define BFIN_MEMMAP_RESERVED 2
struct bfin_memmap {
static struct bfin_memmap {
int nr_map;
struct bfin_memmap_entry {
unsigned long long addr; /* start of memory segment */
......@@ -824,7 +824,15 @@ void __init setup_arch(char **cmdline_p)
flash_probe();
#endif
printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
/* Newer parts mirror SWRST bits in SYSCR */
#if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
defined(CONFIG_BF538) || defined(CONFIG_BF539)
_bfin_swrst = bfin_read_SWRST();
#else
_bfin_swrst = bfin_read_SYSCR();
#endif
#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
......@@ -853,7 +861,7 @@ void __init setup_arch(char **cmdline_p)
else if (_bfin_swrst & RESET_SOFTWARE)
printk(KERN_NOTICE "Reset caused by Software reset\n");
printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
if (bfin_compiled_revid() == 0xffff)
printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
else if (bfin_compiled_revid() == -1)
......
......@@ -673,6 +673,14 @@ static void decode_instruction(unsigned short *address)
verbose_printk("RTI");
else if (opcode == 0x0012)
verbose_printk("RTX");
else if (opcode == 0x0013)
verbose_printk("RTN");
else if (opcode == 0x0014)
verbose_printk("RTE");
else if (opcode == 0x0025)
verbose_printk("EMUEXCPT");
else if (opcode == 0x0040 && opcode <= 0x0047)
verbose_printk("STI R%i", opcode & 7);
else if (opcode >= 0x0050 && opcode <= 0x0057)
verbose_printk("JUMP (P%i)", opcode & 7);
else if (opcode >= 0x0060 && opcode <= 0x0067)
......@@ -681,6 +689,10 @@ static void decode_instruction(unsigned short *address)
verbose_printk("CALL (PC+P%i)", opcode & 7);
else if (opcode >= 0x0080 && opcode <= 0x0087)
verbose_printk("JUMP (PC+P%i)", opcode & 7);
else if (opcode >= 0x0090 && opcode <= 0x009F)
verbose_printk("RAISE 0x%x", opcode & 0xF);
else if (opcode >= 0x00A0 && opcode <= 0x00AF)
verbose_printk("EXCPT 0x%x", opcode & 0xF);
else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF))
verbose_printk("IF !CC JUMP");
else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff))
......@@ -820,11 +832,8 @@ void show_stack(struct task_struct *task, unsigned long *stack)
decode_address(buf, (unsigned int)stack);
printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf);
addr = (unsigned int *)((unsigned int)stack & ~0x3F);
/* First thing is to look for a frame pointer */
for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0;
addr < endstack; addr++, i++) {
for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) {
if (*addr & 0x1)
continue;
ins_addr = (unsigned short *)*addr;
......@@ -834,7 +843,8 @@ void show_stack(struct task_struct *task, unsigned long *stack)
if (fp) {
/* Let's check to see if it is a frame pointer */
while (fp >= (addr - 1) && fp < endstack && fp)
while (fp >= (addr - 1) && fp < endstack
&& fp && ((unsigned int) fp & 0x3) == 0)
fp = (unsigned int *)*fp;
if (fp == 0 || fp == endstack) {
fp = addr - 1;
......@@ -1052,8 +1062,9 @@ void show_regs(struct pt_regs *fp)
char buf [150];
struct irqaction *action;
unsigned int i;
unsigned long flags;
unsigned long flags = 0;
unsigned int cpu = smp_processor_id();
unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted());
verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n",
......@@ -1073,17 +1084,22 @@ void show_regs(struct pt_regs *fp)
}
verbose_printk(KERN_NOTICE " EXCAUSE : 0x%lx\n",
fp->seqstat & SEQSTAT_EXCAUSE);
for (i = 6; i <= 15 ; i++) {
for (i = 2; i <= 15 ; i++) {
if (fp->ipend & (1 << i)) {
decode_address(buf, bfin_read32(EVT0 + 4*i));
verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf);
if (i != 4) {
decode_address(buf, bfin_read32(EVT0 + 4*i));
verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf);
} else
verbose_printk(KERN_NOTICE " interrupts disabled\n");
}
}
/* if no interrupts are going off, don't print this out */
if (fp->ipend & ~0x3F) {
for (i = 0; i < (NR_IRQS - 1); i++) {
spin_lock_irqsave(&irq_desc[i].lock, flags);
if (!in_atomic)
spin_lock_irqsave(&irq_desc[i].lock, flags);
action = irq_desc[i].action;
if (!action)
goto unlock;
......@@ -1096,7 +1112,8 @@ void show_regs(struct pt_regs *fp)
}
verbose_printk("\n");
unlock:
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
if (!in_atomic)
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
}
}
......
......@@ -46,6 +46,7 @@
#include <asm/dpmc.h>
#include <asm/bfin_sdh.h>
#include <linux/spi/ad7877.h>
#include <net/dsa.h>
/*
* Name the Board for the /proc/cpuinfo
......@@ -104,8 +105,31 @@ static struct platform_device rtc_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
static struct dsa_platform_data ksz8893m_switch_data = {
.mii_bus = &bfin_mii_bus.dev,
.netdev = &bfin_mac_device.dev,
.port_names[0] = NULL,
.port_names[1] = "eth%d",
.port_names[2] = "eth%d",
.port_names[3] = "cpu",
};
static struct platform_device ksz8893m_switch_device = {
.name = "dsa",
.id = 0,
.num_resources = 0,
.dev.platform_data = &ksz8893m_switch_data,
};
#endif
......@@ -147,6 +171,15 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
};
#endif
#if defined(CONFIG_NET_DSA_KSZ8893M) \
|| defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
/* SPI SWITCH CHIP */
static struct bfin5xx_spi_chip spi_switch_info = {
.enable_dma = 0,
.bits_per_word = 8,
};
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
.enable_dma = 1,
......@@ -226,6 +259,19 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
},
#endif
#if defined(CONFIG_NET_DSA_KSZ8893M) \
|| defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
{
.modalias = "ksz8893m",
.max_speed_hz = 5000000,
.bus_num = 0,
.chip_select = 1,
.platform_data = NULL,
.controller_data = &spi_switch_info,
.mode = SPI_MODE_3,
},
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
{
.modalias = "spi_mmc_dummy",
......@@ -473,7 +519,6 @@ static struct platform_device i2c_bfin_twi_device = {
};
#endif
#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
{
......@@ -487,7 +532,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
......@@ -584,9 +628,14 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
&ksz8893m_switch_device,
#endif
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
&bfin_spi0_device,
&bfin_spi1_device,
......@@ -632,12 +681,8 @@ static struct platform_device *stamp_devices[] __initdata = {
static int __init ezbrd_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
#endif
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
return 0;
......@@ -649,7 +694,7 @@ void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1();
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
void bfin_get_ether_addr(char *addr)
......
......@@ -103,6 +103,8 @@
#define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2))
#define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
/* SPORT Port Mux */
#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))
#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))
......
......@@ -403,8 +403,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
......@@ -793,7 +798,6 @@ static struct platform_device i2c_bfin_twi_device = {
};
#endif
#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
{
......@@ -809,7 +813,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
......@@ -920,6 +923,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
......@@ -968,27 +972,23 @@ static struct platform_device *stamp_devices[] __initdata = {
&bfin_gpios_device,
};
static int __init stamp_init(void)
static int __init cm_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
#endif
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
return 0;
}
arch_initcall(stamp_init);
arch_initcall(cm_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1();
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
void bfin_get_ether_addr(char *addr)
......
......@@ -208,8 +208,13 @@ static struct platform_device rtc_device = {
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
......@@ -590,7 +595,6 @@ static struct platform_device i2c_bfin_twi_device = {
};
#endif
#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
{
......@@ -604,7 +608,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
......@@ -720,6 +723,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
......@@ -764,27 +768,23 @@ static struct platform_device *stamp_devices[] __initdata = {
&bfin_gpios_device,
};
static int __init stamp_init(void)
static int __init ezbrd_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
#endif
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
return 0;
}
arch_initcall(stamp_init);
arch_initcall(ezbrd_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1();
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
void bfin_get_ether_addr(char *addr)
......
......@@ -425,8 +425,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
......@@ -830,7 +835,6 @@ static struct platform_device i2c_bfin_twi_device = {
};
#endif
#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
{
......@@ -844,7 +848,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
......@@ -988,6 +991,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
......@@ -1048,27 +1052,23 @@ static struct platform_device *stamp_devices[] __initdata = {
&bfin_gpios_device,
};
static int __init stamp_init(void)
static int __init ezkit_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
#endif
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
return 0;
}
arch_initcall(stamp_init);
arch_initcall(ezkit_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1();
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
void bfin_get_ether_addr(char *addr)
......
......@@ -73,6 +73,8 @@
#define P_HWAIT (P_DONTCARE)
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
......
......@@ -309,10 +309,8 @@ static struct platform_device i2c_gpio_device = {
};
#endif
#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
};
#endif
static const unsigned int cclk_vlev_datasheet[] =
{
......@@ -390,10 +388,8 @@ static int __init blackstamp_init(void)
printk(KERN_INFO "%s(): registering device resources\n", __func__);
#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
#endif
ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
if (ret < 0)
......
......@@ -441,7 +441,6 @@ static struct platform_device i2c_gpio_device = {
};
#endif
#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
{
......@@ -461,7 +460,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
#endif
static const unsigned int cclk_vlev_datasheet[] =
{
......@@ -550,10 +548,8 @@ static int __init stamp_init(void)
printk(KERN_INFO "%s(): registering device resources\n", __func__);
#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
#endif
ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
if (ret < 0)
......
......@@ -54,14 +54,11 @@
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
#define P_TMR2 (P_DONTCARE)
#define P_TMR1 (P_DONTCARE)
#define P_TMR0 (P_DONTCARE)
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1))
#endif /* _MACH_PORTMUX_H_ */
......@@ -479,8 +479,13 @@ static struct platform_device bfin_sport1_uart_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
......@@ -591,6 +596,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
......
......@@ -262,8 +262,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
......@@ -662,6 +667,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
......@@ -708,7 +714,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
};
static int __init stamp_init(void)
static int __init generic_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
......@@ -720,13 +726,13 @@ static int __init stamp_init(void)
return 0;
}
arch_initcall(stamp_init);
arch_initcall(generic_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1();
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
......
......@@ -61,8 +61,13 @@ static struct platform_device rtc_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
......@@ -324,6 +329,7 @@ static struct platform_device *minotaur_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
......@@ -377,5 +383,5 @@ void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1();
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
......@@ -198,8 +198,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
......@@ -529,6 +534,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
......@@ -558,7 +564,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
};
static int __init stamp_init(void)
static int __init pnav_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
......@@ -569,7 +575,7 @@ static int __init stamp_init(void)
return 0;
}
arch_initcall(stamp_init);
arch_initcall(pnav_init);
void bfin_get_ether_addr(char *addr)
{
......
......@@ -321,8 +321,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
......@@ -1068,7 +1073,6 @@ static struct adp5588_kpad_platform_data adp5588_kpad_data = {
};
#endif
#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
{
......@@ -1102,7 +1106,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
......@@ -1217,6 +1220,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
......@@ -1284,12 +1288,8 @@ static struct platform_device *stamp_devices[] __initdata = {
static int __init stamp_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
#endif
bfin_plat_nand_init();
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
......@@ -1307,7 +1307,7 @@ void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1();
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
/*
......
......@@ -481,8 +481,13 @@ static struct platform_device bfin_sport1_uart_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
.name = "bfin_mii_bus",
};
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
.dev.platform_data = &bfin_mii_bus,
};
#endif
......@@ -593,6 +598,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
&bfin_mii_bus,
&bfin_mac_device,
#endif
......@@ -615,7 +621,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
&bfin_gpios_device,
};
static int __init cm_bf537_init(void)
static int __init tcm_bf537_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
......@@ -629,7 +635,7 @@ static int __init cm_bf537_init(void)
return 0;
}
arch_initcall(cm_bf537_init);
arch_initcall(tcm_bf537_init);
void bfin_get_ether_addr(char *addr)
{
......
......@@ -31,6 +31,7 @@
#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))
#define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))
#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
......
......@@ -102,5 +102,6 @@
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
#endif /* _MACH_PORTMUX_H_ */
......@@ -781,7 +781,6 @@ static struct platform_device i2c_bfin_twi1_device = {
#endif
#endif
#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
};
......@@ -800,7 +799,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
#endif
};
#endif
#endif
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
#include <linux/gpio_keys.h>
......@@ -956,13 +954,11 @@ static int __init ezkit_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info0,
ARRAY_SIZE(bfin_i2c_board_info0));
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
i2c_register_board_info(1, bfin_i2c_board_info1,
ARRAY_SIZE(bfin_i2c_board_info1));
#endif
#endif
platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
......
......@@ -175,6 +175,7 @@
#define ANOMALY_05000311 (0)
#define ANOMALY_05000323 (0)
#define ANOMALY_05000363 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000412 (0)
#define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0)
......
......@@ -104,6 +104,18 @@
#define AMGCTLVAL (V_AMBEN | V_AMCKEN)
#if defined(CONFIG_BF542M)
# define CONFIG_BF542
#elif defined(CONFIG_BF544M)
# define CONFIG_BF544
#elif defined(CONFIG_BF547M)
# define CONFIG_BF547
#elif defined(CONFIG_BF548M)
# define CONFIG_BF548
#elif defined(CONFIG_BF549M)
# define CONFIG_BF549
#endif
#if defined(CONFIG_BF542)
# define CPU "BF542"
# define CPUID 0x27de
......
......@@ -195,17 +195,17 @@
struct gpio_port_t {
unsigned short port_fer;
unsigned short dummy1;
unsigned short port_data;
unsigned short data;
unsigned short dummy2;
unsigned short port_set;
unsigned short data_set;
unsigned short dummy3;
unsigned short port_clear;
unsigned short data_clear;
unsigned short dummy4;
unsigned short port_dir_set;
unsigned short dir_set;
unsigned short dummy5;
unsigned short port_dir_clear;
unsigned short dir_clear;
unsigned short dummy6;
unsigned short port_inen;
unsigned short inen;
unsigned short dummy7;
unsigned int port_mux;
};
......
......@@ -125,6 +125,7 @@
#define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3))
#define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0))
#define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0))
#define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0))
......
......@@ -1106,6 +1106,8 @@
#define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */
#define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */
#define POL 0x0000C000 /* PPI Signal Polarities */
#define POLC 0x4000 /* PPI Clock Polarity */
#define POLS 0x8000 /* PPI Frame Sync Polarity */
/* PPI_STATUS Masks */
#define FLD 0x00000400 /* Field Indicator */
......
......@@ -85,5 +85,6 @@
#define P_SPI0_MOSI (P_DONTCARE)
#define P_SPI0_MISO (P_DONTCARE)
#define P_SPI0_SCK (P_DONTCARE)
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
#endif /* _MACH_PORTMUX_H_ */
......@@ -14,6 +14,7 @@
#include <asm/clocks.h>
#include <asm/mem_init.h>
#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */
#define PLL_CTL_VAL \
(((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \
(PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0))
......@@ -76,7 +77,7 @@ void init_clocks(void)
bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
#ifdef EBIU_SDGCTL
bfin_write_EBIU_SDRRC(mem_SDRRC);
bfin_write_EBIU_SDGCTL(mem_SDGCTL);
bfin_write_EBIU_SDGCTL((bfin_read_EBIU_SDGCTL() & SDGCTL_WIDTH) | mem_SDGCTL);
#else
bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ));
do_sync();
......
......@@ -151,13 +151,6 @@ ENTRY(_ex_syscall)
jump.s _bfin_return_from_exception;
ENDPROC(_ex_syscall)
ENTRY(_ex_soft_bp)
r7 = retx;
r7 += -2;
retx = r7;
jump.s _ex_trap_c;
ENDPROC(_ex_soft_bp)
ENTRY(_ex_single_step)
/* If we just returned from an interrupt, the single step event is
for the RTI instruction. */
......@@ -1087,7 +1080,7 @@ ENTRY(_ex_table)
* EXCPT instruction can provide 4 bits of EXCAUSE, allowing 16 to be user defined
*/
.long _ex_syscall /* 0x00 - User Defined - Linux Syscall */
.long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */
.long _ex_trap_c /* 0x01 - User Defined - Software breakpoint */
#ifdef CONFIG_KGDB
.long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection
and break signal trap */
......
......@@ -17,6 +17,19 @@
__INIT
ENTRY(__init_clear_bss)
r2 = r2 - r1;
cc = r2 == 0;
if cc jump .L_bss_done;
r2 >>= 2;
p1 = r1;
p2 = r2;
lsetup (1f, 1f) lc0 = p2;
1: [p1++] = r0;
.L_bss_done:
rts;
ENDPROC(__init_clear_bss)
#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
ENTRY(__start)
......@@ -144,6 +157,35 @@ ENTRY(__start)
call _init_early_exception_vectors;
#endif
r0 = 0 (x);
/* Zero out all of the fun bss regions */
#if L1_DATA_A_LENGTH > 0
r1.l = __sbss_l1;
r1.h = __sbss_l1;
r2.l = __ebss_l1;
r2.h = __ebss_l1;
call __init_clear_bss
#endif
#if L1_DATA_B_LENGTH > 0
r1.l = __sbss_b_l1;
r1.h = __sbss_b_l1;
r2.l = __ebss_b_l1;
r2.h = __ebss_b_l1;
call __init_clear_bss
#endif
#if L2_LENGTH > 0
r1.l = __sbss_l2;
r1.h = __sbss_l2;
r2.l = __ebss_l2;
r2.h = __ebss_l2;
call __init_clear_bss
#endif
r1.l = ___bss_start;
r1.h = ___bss_start;
r2.l = ___bss_stop;
r2.h = ___bss_stop;
call __init_clear_bss
/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
call _bfin_relocate_l1_mem;
#ifdef CONFIG_BFIN_KERNEL_CLOCK
......@@ -185,19 +227,6 @@ ENDPROC(__start)
# define WDOG_CTL WDOGA_CTL
#endif
ENTRY(__init_clear_bss)
r2 = r2 - r1;
cc = r2 == 0;
if cc jump .L_bss_done;
r2 >>= 2;
p1 = r1;
p2 = r2;
lsetup (1f, 1f) lc0 = p2;
1: [p1++] = r0;
.L_bss_done:
rts;
ENDPROC(__init_clear_bss)
ENTRY(_real_start)
/* Enable nested interrupts */
[--sp] = reti;
......@@ -209,35 +238,6 @@ ENTRY(_real_start)
w[p0] = r0;
ssync;
r0 = 0 (x);
/* Zero out all of the fun bss regions */
#if L1_DATA_A_LENGTH > 0
r1.l = __sbss_l1;
r1.h = __sbss_l1;
r2.l = __ebss_l1;
r2.h = __ebss_l1;
call __init_clear_bss
#endif
#if L1_DATA_B_LENGTH > 0
r1.l = __sbss_b_l1;
r1.h = __sbss_b_l1;
r2.l = __ebss_b_l1;
r2.h = __ebss_b_l1;
call __init_clear_bss
#endif
#if L2_LENGTH > 0
r1.l = __sbss_l2;
r1.h = __sbss_l2;
r2.l = __ebss_l2;
r2.h = __ebss_l2;
call __init_clear_bss
#endif
r1.l = ___bss_start;
r1.h = ___bss_start;
r2.l = ___bss_stop;
r2.h = ___bss_stop;
call __init_clear_bss
/* Pass the u-boot arguments to the global value command line */
R0 = R7;
call _cmdline_init;
......
......@@ -195,7 +195,7 @@ ENDPROC(_evt_ivhw)
/* Interrupt routine for evt2 (NMI).
* We don't actually use this, so just return.
* For inner circle type details, please see:
* http://docs.blackfin.uclinux.org/doku.php?id=linux:nmi
* http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:nmi
*/
ENTRY(_evt_nmi)
.weak _evt_nmi
......
......@@ -1101,10 +1101,9 @@ int __init init_arch_irq(void)
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \
|| defined(BF538_FAMILY) || defined(CONFIG_BF51x)
#ifdef SIC_IWR0
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
# ifdef SIC_IWR1
/* BF52x/BF51x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
......@@ -1114,10 +1113,8 @@ int __init init_arch_irq(void)
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#endif
# ifdef CONFIG_BF54x
# endif
# ifdef SIC_IWR2
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
......
......@@ -82,10 +82,9 @@ void bfin_pm_suspend_standby_enter(void)
bfin_pm_standby_restore();
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \
defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x)
#ifdef SIC_IWR0
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
# ifdef SIC_IWR1
/* BF52x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
......@@ -95,10 +94,8 @@ void bfin_pm_suspend_standby_enter(void)
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#endif
# ifdef CONFIG_BF54x
# endif
# ifdef SIC_IWR2
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
......
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