提交 ea6bc80d 编写于 作者: A Ard Biesheuvel

arm64/efi: set PE/COFF section alignment to 4 KB

Position independent AArch64 code needs to be linked and loaded at the
same relative offset from a 4 KB boundary, or adrp/add and adrp/ldr
pairs will not work correctly. (This is how PC relative symbol
references with a 4 GB reach are emitted)

We need to declare this in the PE/COFF header, otherwise the PE/COFF
loader may load the Image and invoke the stub at an offset which
violates this rule.
Reviewed-by: NRoy Franz <roy.franz@linaro.org>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
上级 95b39596
...@@ -161,7 +161,7 @@ optional_header: ...@@ -161,7 +161,7 @@ optional_header:
extra_header_fields: extra_header_fields:
.quad 0 // ImageBase .quad 0 // ImageBase
.long 0x20 // SectionAlignment .long 0x1000 // SectionAlignment
.long 0x8 // FileAlignment .long 0x8 // FileAlignment
.short 0 // MajorOperatingSystemVersion .short 0 // MajorOperatingSystemVersion
.short 0 // MinorOperatingSystemVersion .short 0 // MinorOperatingSystemVersion
...@@ -228,7 +228,15 @@ section_table: ...@@ -228,7 +228,15 @@ section_table:
.short 0 // NumberOfRelocations (0 for executables) .short 0 // NumberOfRelocations (0 for executables)
.short 0 // NumberOfLineNumbers (0 for executables) .short 0 // NumberOfLineNumbers (0 for executables)
.long 0xe0500020 // Characteristics (section flags) .long 0xe0500020 // Characteristics (section flags)
.align 5
/*
* EFI will load stext onwards at the 4k section alignment
* described in the PE/COFF header. To ensure that instruction
* sequences using an adrp and a :lo12: immediate will function
* correctly at this alignment, we must ensure that stext is
* placed at a 4k boundary in the Image to begin with.
*/
.align 12
#endif #endif
ENTRY(stext) ENTRY(stext)
......
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