diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 0e25a996bb4c17d65d02231bdb996647e56634f1..4965986b4ad56ee2ec794487ec606b3f670873c9 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -67,8 +67,8 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) static struct plat_serial8250_port serial_platform_data[] = { { - .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE), - .mapbase = (unsigned long)OMAP_UART1_BASE, + .membase = IO_ADDRESS(OMAP_UART1_BASE), + .mapbase = OMAP_UART1_BASE, .irq = INT_UART1, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -76,8 +76,8 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE), - .mapbase = (unsigned long)OMAP_UART2_BASE, + .membase = IO_ADDRESS(OMAP_UART2_BASE), + .mapbase = OMAP_UART2_BASE, .irq = INT_UART2, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -85,8 +85,8 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE), - .mapbase = (unsigned long)OMAP_UART3_BASE, + .membase = IO_ADDRESS(OMAP_UART3_BASE), + .mapbase = OMAP_UART3_BASE, .irq = INT_UART3, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 87a44c715aa4dd1b0604f4f81874c15df9de5d7b..65fdf78c91e1b1d03c62f006d0937e35b16f3d28 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -18,7 +18,7 @@ #ifndef __ASSEMBLER__ #define OMAP_CM_REGADDR(module, reg) \ - (void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg)) + IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg)) #else #define OMAP2420_CM_REGADDR(module, reg) \ IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index f51d69bc457dac2be97ff36c81ed4e037155c67c..9b4e58ee2ca222f754156b078444ff43003349e4 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -64,10 +64,8 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM]; static DEFINE_SPINLOCK(gpmc_mem_lock); static unsigned gpmc_cs_map; -static void __iomem *gpmc_base = - (void __iomem *) IO_ADDRESS(GPMC_BASE); -static void __iomem *gpmc_cs_base = - (void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0; +static void __iomem *gpmc_base = IO_ADDRESS(GPMC_BASE); +static void __iomem *gpmc_cs_base = IO_ADDRESS(GPMC_BASE) + GPMC_CS0; static struct clk *gpmc_fck; diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index a5d4526ac4d6debdb1f0a0e0393bc37443e00bac..e53ebe7d58be22b06735e1f9633698c230a882fd 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -21,11 +21,11 @@ #include #if defined(CONFIG_ARCH_OMAP2420) -#define TAP_BASE io_p2v(0x48014000) +#define TAP_BASE IO_ADDRESS(0x48014000) #elif defined(CONFIG_ARCH_OMAP2430) -#define TAP_BASE io_p2v(0x4900A000) +#define TAP_BASE IO_ADDRESS(0x4900A000) #elif defined(CONFIG_ARCH_OMAP34XX) -#define TAP_BASE io_p2v(0x4830A000) +#define TAP_BASE IO_ADDRESS(0x4830A000) #endif #define OMAP_TAP_IDCODE 0x0204 diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 9ef15b31d8fcc4f8c0b62167ef889685905fcbd1..742bd0070e63acbae83f3c6730baf4f2a885d097 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -32,7 +32,7 @@ * for each bank.. when in doubt, consult the TRM. */ static struct omap_irq_bank { - unsigned long base_reg; + void __iomem *base_reg; unsigned int nr_irqs; } __attribute__ ((aligned(4))) irq_banks[] = { { @@ -94,7 +94,7 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) unsigned long tmp; tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff; - printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " + printk(KERN_INFO "IRQ: Found an INTC at 0x%p " "(revision %ld.%ld) with %d interrupts\n", bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index bbf41fc8e9a9102cd70003b59fb7c85615f4339e..026d8a776ae6979573e447b95c7f3fc356f3a91f 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -18,7 +18,7 @@ #ifndef __ASSEMBLER__ #define OMAP_PRM_REGADDR(module, reg) \ - (void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg)) + IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg)) #else #define OMAP2420_PRM_REGADDR(module, reg) \ IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index adc8a26a8fb01757ee6f18ced5104ac9db1edaa8..7faa53c3a9255c6f83a137ab32177ea379b65dd1 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -32,24 +32,24 @@ static struct clk * uart3_fck = NULL; static struct plat_serial8250_port serial_platform_data[] = { { - .membase = (char *)IO_ADDRESS(OMAP_UART1_BASE), - .mapbase = (unsigned long)OMAP_UART1_BASE, + .membase = IO_ADDRESS(OMAP_UART1_BASE), + .mapbase = OMAP_UART1_BASE, .irq = 72, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = (char *)IO_ADDRESS(OMAP_UART2_BASE), - .mapbase = (unsigned long)OMAP_UART2_BASE, + .membase = IO_ADDRESS(OMAP_UART2_BASE), + .mapbase = OMAP_UART2_BASE, .irq = 73, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = (char *)IO_ADDRESS(OMAP_UART3_BASE), - .mapbase = (unsigned long)OMAP_UART3_BASE, + .membase = IO_ADDRESS(OMAP_UART3_BASE), + .mapbase = OMAP_UART3_BASE, .irq = 74, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -71,7 +71,7 @@ static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, int value) { offset <<= p->regshift; - __raw_writeb(value, (unsigned long)(p->membase + offset)); + __raw_writeb(value, p->membase + offset); } /* diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index f4dff423ae7c19569adf3302f7851a527b595360..20e8db5fe32a58cc22156b737d4079e321bb3966 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -258,12 +258,12 @@ static void __init __omap2_set_globals(void) #if defined(CONFIG_ARCH_OMAP2420) static struct omap_globals omap242x_globals = { - .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x48014000), - .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), - .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), - .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), - .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), - .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), + .tap = OMAP2_IO_ADDRESS(0x48014000), + .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), }; void __init omap2_set_globals_242x(void) @@ -276,12 +276,12 @@ void __init omap2_set_globals_242x(void) #if defined(CONFIG_ARCH_OMAP2430) static struct omap_globals omap243x_globals = { - .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4900a000), - .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), - .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), - .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), - .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), - .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), + .tap = OMAP2_IO_ADDRESS(0x4900a000), + .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), }; void __init omap2_set_globals_243x(void) @@ -294,12 +294,12 @@ void __init omap2_set_globals_243x(void) #if defined(CONFIG_ARCH_OMAP3430) static struct omap_globals omap343x_globals = { - .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4830A000), - .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), - .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), - .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), - .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), - .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), + .tap = OMAP2_IO_ADDRESS(0x4830A000), + .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), }; void __init omap2_set_globals_343x(void) diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index a63b644ad30574b024f4ff60146f9233b7fa17db..b4057e2718759a16b45e75e4c3a389fdda863e44 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -2297,13 +2297,13 @@ static int __init omap_init_dma(void) int ch, r; if (cpu_class_is_omap1()) { - omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP1_DMA_BASE); + omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE); dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; } else if (cpu_is_omap24xx()) { - omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP24XX_DMA4_BASE); + omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE); dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; } else if (cpu_is_omap34xx()) { - omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP34XX_DMA4_BASE); + omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE); dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; } else { pr_err("DMA init failed for unsupported omap\n"); diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 743a4abcd85d99f6a23bb897be2315b57012fc6f..df61ad247dc2fc6afba2f550aaaca9fa8c7f5b9d 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -693,7 +693,7 @@ int __init omap_dm_timer_init(void) for (i = 0; i < dm_timer_count; i++) { timer = &dm_timers[i]; - timer->io_base = (void __iomem *)io_p2v(timer->phys_base); + timer->io_base = IO_ADDRESS(timer->phys_base); #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) if (cpu_class_is_omap2()) { char clk_name[16]; diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h index e3fd62d9a995115bc2514807a8203f52dfe31684..ee378d254cbd2faf1a2ea5b6597b8475851496ea 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/mach/control.h @@ -19,11 +19,11 @@ #include #define OMAP242X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) + IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) #define OMAP243X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) + IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) #define OMAP343X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) + IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) /* * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h index b9f57ce0ac157da425149bc8d59e3b3e8b8a1ab6..dd0cf069431df34dd0b3a8d48e67df5cef5f23f9 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/mach/io.h @@ -55,14 +55,13 @@ #if defined(CONFIG_ARCH_OMAP1) -#define IO_PHYS 0xFFFB0000 -#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ -#define IO_SIZE 0x40000 -#define IO_VIRT (IO_PHYS - IO_OFFSET) -#define IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define io_p2v(pa) ((pa) - IO_OFFSET) -#define io_v2p(va) ((va) + IO_OFFSET) +#define IO_PHYS 0xFFFB0000 +#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ +#define IO_SIZE 0x40000 +#define IO_VIRT (IO_PHYS - IO_OFFSET) +#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET) +#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) +#define io_v2p(va) ((va) + IO_OFFSET) #elif defined(CONFIG_ARCH_OMAP2) @@ -90,11 +89,10 @@ #endif -#define IO_OFFSET 0x90000000 -#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ +#define IO_OFFSET 0x90000000 +#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ +#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ +#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ /* DSP */ #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ @@ -149,9 +147,8 @@ #define IO_OFFSET 0x90000000 -#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ #define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ /* DSP */ @@ -167,7 +164,14 @@ #endif -#ifndef __ASSEMBLER__ +#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) +#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa)) +#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa)) + +#ifdef __ASSEMBLER__ +#define IOMEM(x) x +#else +#define IOMEM(x) ((void __force __iomem *)(x)) /* * Functions to access the OMAP IO region @@ -178,13 +182,13 @@ * - DO NOT use hardcoded virtual addresses to allow changing the * IO address space again if needed */ -#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) -#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) -#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) +#define omap_readb(a) __raw_readb(IO_ADDRESS(a)) +#define omap_readw(a) __raw_readw(IO_ADDRESS(a)) +#define omap_readl(a) __raw_readl(IO_ADDRESS(a)) -#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) -#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) -#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) +#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a)) +#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a)) +#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a)) extern void omap1_map_common_io(void); extern void omap1_init_common_hw(void); diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h index bfa09325a5ffad992a7c2aadd05b84d899ccf36d..6063e9681de2653d17f13350482c58290c562cae 100644 --- a/arch/arm/plat-omap/include/mach/pm.h +++ b/arch/arm/plat-omap/include/mach/pm.h @@ -39,11 +39,11 @@ * Register and offset definitions to be used in PM assembler code * ---------------------------------------------------------------------------- */ -#define CLKGEN_REG_ASM_BASE io_p2v(0xfffece00) +#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00) #define ARM_IDLECT1_ASM_OFFSET 0x04 #define ARM_IDLECT2_ASM_OFFSET 0x08 -#define TCMIF_ASM_BASE io_p2v(0xfffecc00) +#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00) #define EMIFS_CONFIG_ASM_OFFSET 0x0c #define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index 787b7acec546eeaf7330be8e8e834b83e5b22d61..d908eb527c8de43c2fd7b4eab4e1d8d3fc467039 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h @@ -63,9 +63,9 @@ */ -#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) -#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) -#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) +#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg) +#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg) +#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg) /* SMS register offsets - read/write with sms_{read,write}_reg() */ diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c index 58f624bd22e9802aee39223b6f50dd9599001455..dfb72f5e4c962ad35098fb07a65252b99be31941 100644 --- a/drivers/video/omap/dispc.c +++ b/drivers/video/omap/dispc.c @@ -212,9 +212,9 @@ static void enable_rfbi_mode(int enable) dispc_write_reg(DISPC_CONTROL, l); /* Set bypass mode in RFBI module */ - l = __raw_readl(io_p2v(RFBI_CONTROL)); + l = __raw_readl(IO_ADDRESS(RFBI_CONTROL)); l |= enable ? 0 : (1 << 1); - __raw_writel(l, io_p2v(RFBI_CONTROL)); + __raw_writel(l, IO_ADDRESS(RFBI_CONTROL)); } static void set_lcd_data_lines(int data_lines) @@ -1419,7 +1419,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode, } /* L3 firewall setting: enable access to OCM RAM */ - __raw_writel(0x402000b0, io_p2v(0x680050a0)); + __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0)); if ((r = alloc_palette_ram()) < 0) goto fail2;