提交 e5d809d7 编写于 作者: K Krzysztof Helt 提交者: Linus Torvalds

pm2fb: Permedia 2V memory clock setting

Permedia 2V uses its own registers to set a memory clock. The
patch adds these registers and uses them in the set_memclock()
function.
Signed-off-by: NKrzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: NAntonino Daplas <adaplas@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
上级 f1c15f93
...@@ -462,6 +462,26 @@ static void set_memclock(struct pm2fb_par* par, u32 clk) ...@@ -462,6 +462,26 @@ static void set_memclock(struct pm2fb_par* par, u32 clk)
int i; int i;
unsigned char m, n, p; unsigned char m, n, p;
switch (par->type) {
case PM2_TYPE_PERMEDIA2V:
pm2v_mnp(clk/2, &m, &n, &p);
WAIT_FIFO(par, 8);
pm2_WR(par, PM2VR_RD_INDEX_HIGH, PM2VI_RD_MCLK_CONTROL >> 8);
pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 0);
wmb();
pm2v_RDAC_WR(par, PM2VI_RD_MCLK_PRESCALE, m);
pm2v_RDAC_WR(par, PM2VI_RD_MCLK_FEEDBACK, n);
pm2v_RDAC_WR(par, PM2VI_RD_MCLK_POSTSCALE, p);
wmb();
pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 1);
rmb();
for (i = 256;
i && !(pm2_RDAC_RD(par, PM2VI_RD_MCLK_CONTROL) & 2);
i--)
;
pm2_WR(par, PM2VR_RD_INDEX_HIGH, 0);
break;
case PM2_TYPE_PERMEDIA2:
pm2_mnp(clk, &m, &n, &p); pm2_mnp(clk, &m, &n, &p);
WAIT_FIFO(par, 10); WAIT_FIFO(par, 10);
pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 6); pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 6);
...@@ -477,6 +497,8 @@ static void set_memclock(struct pm2fb_par* par, u32 clk) ...@@ -477,6 +497,8 @@ static void set_memclock(struct pm2fb_par* par, u32 clk)
i && !(pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED); i && !(pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED);
i--) i--)
; ;
break;
}
} }
static void set_pixclock(struct pm2fb_par* par, u32 clk) static void set_pixclock(struct pm2fb_par* par, u32 clk)
......
...@@ -154,6 +154,10 @@ ...@@ -154,6 +154,10 @@
#define PM2VI_RD_CLK1_PRESCALE 0x204 #define PM2VI_RD_CLK1_PRESCALE 0x204
#define PM2VI_RD_CLK1_FEEDBACK 0x205 #define PM2VI_RD_CLK1_FEEDBACK 0x205
#define PM2VI_RD_CLK1_POSTSCALE 0x206 #define PM2VI_RD_CLK1_POSTSCALE 0x206
#define PM2VI_RD_MCLK_CONTROL 0x20D
#define PM2VI_RD_MCLK_PRESCALE 0x20E
#define PM2VI_RD_MCLK_FEEDBACK 0x20F
#define PM2VI_RD_MCLK_POSTSCALE 0x210
#define PM2VI_RD_CURSOR_PALETTE 0x303 #define PM2VI_RD_CURSOR_PALETTE 0x303
#define PM2VI_RD_CURSOR_PATTERN 0x400 #define PM2VI_RD_CURSOR_PATTERN 0x400
......
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