diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h index d0ce89b5be3aab40531b8d1082cc1fc1e6798311..e2e22cd5305b7f8a9e0237fef0399f0e989d73f2 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h @@ -2,14 +2,8 @@ #define __NVKM_CE_H__ #include -void gt215_ce_intr(struct nvkm_falcon *, struct nvkm_fifo_chan *); - int gt215_ce_new(struct nvkm_device *, int, struct nvkm_engine **); int gf100_ce_new(struct nvkm_device *, int, struct nvkm_engine **); -extern struct nvkm_oclass gk104_ce0_oclass; -extern struct nvkm_oclass gk104_ce1_oclass; -extern struct nvkm_oclass gk104_ce2_oclass; -extern struct nvkm_oclass gm204_ce0_oclass; -extern struct nvkm_oclass gm204_ce1_oclass; -extern struct nvkm_oclass gm204_ce2_oclass; +int gk104_ce_new(struct nvkm_device *, int, struct nvkm_engine **); +int gm204_ce_new(struct nvkm_device *, int, struct nvkm_engine **); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c index e45c6d703c00be7f27c9a78e1ea7182b4546b06c..6b36b86f858fe44d2f63665b339ba648bd6e5c54 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c @@ -21,7 +21,7 @@ * * Authors: Ben Skeggs */ -#include +#include "priv.h" #include "fuc/gf100.fuc3.h" #include diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c index f35677b87d29bc808c3a993ce96818422f897fbc..5de21a2ebb9ad0642adabf192673c45a839f9546 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c @@ -21,121 +21,47 @@ * * Authors: Ben Skeggs */ -#include -#include +#include "priv.h" #include -static void -gk104_ce_intr(struct nvkm_subdev *subdev) +void +gk104_ce_intr(struct nvkm_engine *ce) { + const u32 base = (ce->subdev.index - NVDEV_ENGINE_CE0) * 0x1000; + struct nvkm_subdev *subdev = &ce->subdev; struct nvkm_device *device = subdev->device; - const int idx = nv_subidx(subdev) - NVDEV_ENGINE_CE0; - u32 stat = nvkm_rd32(device, 0x104908 + (idx * 0x1000)); - + u32 stat = nvkm_rd32(device, 0x104908 + base); if (stat) { nvkm_warn(subdev, "intr %08x\n", stat); - nvkm_wr32(device, 0x104908 + (idx * 0x1000), stat); + nvkm_wr32(device, 0x104908 + base, stat); } } static const struct nvkm_engine_func gk104_ce = { + .intr = gk104_ce_intr, .sclass = { { -1, -1, KEPLER_DMA_COPY_A }, {} } }; -static int -gk104_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) -{ - struct nvkm_engine *ce; - int ret; - - ret = nvkm_engine_create(parent, engine, oclass, true, - "PCE0", "ce0", &ce); - *pobject = nv_object(ce); - if (ret) - return ret; - - ce->func = &gk104_ce; - nv_subdev(ce)->unit = 0x00000040; - nv_subdev(ce)->intr = gk104_ce_intr; - return 0; -} - -static int -gk104_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) -{ - struct nvkm_engine *ce; - int ret; - - ret = nvkm_engine_create(parent, engine, oclass, true, - "PCE1", "ce1", &ce); - *pobject = nv_object(ce); - if (ret) - return ret; - - ce->func = &gk104_ce; - nv_subdev(ce)->unit = 0x00000080; - nv_subdev(ce)->intr = gk104_ce_intr; - return 0; -} - -static int -gk104_ce2_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +gk104_ce_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_engine *ce; - int ret; - - ret = nvkm_engine_create(parent, engine, oclass, true, - "PCE2", "ce2", &ce); - *pobject = nv_object(ce); - if (ret) - return ret; - - ce->func = &gk104_ce; - nv_subdev(ce)->unit = 0x00200000; - nv_subdev(ce)->intr = gk104_ce_intr; - return 0; + if (index == NVDEV_ENGINE_CE0) { + return nvkm_engine_new_(&gk104_ce, device, index, + 0x00000040, true, pengine); + } else + if (index == NVDEV_ENGINE_CE1) { + return nvkm_engine_new_(&gk104_ce, device, index, + 0x00000080, true, pengine); + } else + if (index == NVDEV_ENGINE_CE2) { + return nvkm_engine_new_(&gk104_ce, device, index, + 0x00200000, true, pengine); + } + return -ENODEV; } - -struct nvkm_oclass -gk104_ce0_oclass = { - .handle = NV_ENGINE(CE0, 0xe0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gk104_ce0_ctor, - .dtor = _nvkm_engine_dtor, - .init = _nvkm_engine_init, - .fini = _nvkm_engine_fini, - }, -}; - -struct nvkm_oclass -gk104_ce1_oclass = { - .handle = NV_ENGINE(CE1, 0xe0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gk104_ce1_ctor, - .dtor = _nvkm_engine_dtor, - .init = _nvkm_engine_init, - .fini = _nvkm_engine_fini, - }, -}; - -struct nvkm_oclass -gk104_ce2_oclass = { - .handle = NV_ENGINE(CE2, 0xe0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gk104_ce2_ctor, - .dtor = _nvkm_engine_dtor, - .init = _nvkm_engine_init, - .fini = _nvkm_engine_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm204.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm204.c index cb8faea1db74db65ca579cd9b5815c06d4493682..e89c44cb23e1c2387451b4a4021ea3ff92cbc389 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm204.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gm204.c @@ -21,121 +21,34 @@ * * Authors: Ben Skeggs */ -#include -#include +#include "priv.h" #include -static void -gm204_ce_intr(struct nvkm_subdev *subdev) -{ - struct nvkm_device *device = subdev->device; - const int idx = nv_subidx(subdev) - NVDEV_ENGINE_CE0; - u32 stat = nvkm_rd32(device, 0x104908 + (idx * 0x1000)); - - if (stat) { - nvkm_warn(subdev, "intr %08x\n", stat); - nvkm_wr32(device, 0x104908 + (idx * 0x1000), stat); - } -} - static const struct nvkm_engine_func gm204_ce = { + .intr = gk104_ce_intr, .sclass = { { -1, -1, MAXWELL_DMA_COPY_A }, {} } }; -static int -gm204_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) -{ - struct nvkm_engine *ce; - int ret; - - ret = nvkm_engine_create(parent, engine, oclass, true, - "PCE0", "ce0", &ce); - *pobject = nv_object(ce); - if (ret) - return ret; - - ce->func = &gm204_ce; - nv_subdev(ce)->unit = 0x00000040; - nv_subdev(ce)->intr = gm204_ce_intr; - return 0; -} - -static int -gm204_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) -{ - struct nvkm_engine *ce; - int ret; - - ret = nvkm_engine_create(parent, engine, oclass, true, - "PCE1", "ce1", &ce); - *pobject = nv_object(ce); - if (ret) - return ret; - - ce->func = &gm204_ce; - nv_subdev(ce)->unit = 0x00000080; - nv_subdev(ce)->intr = gm204_ce_intr; - return 0; -} - -static int -gm204_ce2_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +gm204_ce_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_engine *ce; - int ret; - - ret = nvkm_engine_create(parent, engine, oclass, true, - "PCE2", "ce2", &ce); - *pobject = nv_object(ce); - if (ret) - return ret; - - ce->func = &gm204_ce; - nv_subdev(ce)->unit = 0x00200000; - nv_subdev(ce)->intr = gm204_ce_intr; - return 0; + if (index == NVDEV_ENGINE_CE0) { + return nvkm_engine_new_(&gm204_ce, device, index, + 0x00000040, true, pengine); + } else + if (index == NVDEV_ENGINE_CE1) { + return nvkm_engine_new_(&gm204_ce, device, index, + 0x00000080, true, pengine); + } else + if (index == NVDEV_ENGINE_CE2) { + return nvkm_engine_new_(&gm204_ce, device, index, + 0x00200000, true, pengine); + } + return -ENODEV; } - -struct nvkm_oclass -gm204_ce0_oclass = { - .handle = NV_ENGINE(CE0, 0x24), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gm204_ce0_ctor, - .dtor = _nvkm_engine_dtor, - .init = _nvkm_engine_init, - .fini = _nvkm_engine_fini, - }, -}; - -struct nvkm_oclass -gm204_ce1_oclass = { - .handle = NV_ENGINE(CE1, 0x24), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gm204_ce1_ctor, - .dtor = _nvkm_engine_dtor, - .init = _nvkm_engine_init, - .fini = _nvkm_engine_fini, - }, -}; - -struct nvkm_oclass -gm204_ce2_oclass = { - .handle = NV_ENGINE(CE2, 0x24), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gm204_ce2_ctor, - .dtor = _nvkm_engine_dtor, - .init = _nvkm_engine_init, - .fini = _nvkm_engine_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c index f8223d696598d8304e2037dde507e03f2f4e01aa..764b46751eb9036bbc67001ffe4b4f57884a02a4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c @@ -21,12 +21,12 @@ * * Authors: Ben Skeggs */ -#include -#include +#include "priv.h" #include "fuc/gt215.fuc3.h" #include #include +#include #include @@ -43,7 +43,7 @@ gt215_ce_intr(struct nvkm_falcon *ce, struct nvkm_fifo_chan *chan) { struct nvkm_subdev *subdev = &ce->engine.subdev; struct nvkm_device *device = subdev->device; - const u32 base = (nv_subidx(subdev) - NVDEV_ENGINE_CE0) * 0x1000; + const u32 base = (subdev->index - NVDEV_ENGINE_CE0) * 0x1000; u32 ssta = nvkm_rd32(device, 0x104040 + base) & 0x0000ffff; u32 addr = nvkm_rd32(device, 0x104040 + base) >> 16; u32 mthd = (addr & 0x07ff) << 2; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h new file mode 100644 index 0000000000000000000000000000000000000000..e2fa8b1619437597df5df065e6792e24bd11f97c --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h @@ -0,0 +1,7 @@ +#ifndef __NVKM_CE_PRIV_H__ +#define __NVKM_CE_PRIV_H__ +#include + +void gt215_ce_intr(struct nvkm_falcon *, struct nvkm_fifo_chan *); +void gk104_ce_intr(struct nvkm_engine *); +#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index f5afe9353b452e79b59bd5313998d99580bb9984..926e07fe0912817ec664de30f36b45a03a64c0d3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -1616,9 +1616,9 @@ nve4_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce_new, -// .ce[1] = gk104_ce_new, -// .ce[2] = gk104_ce2_new, + .ce[0] = gk104_ce_new, + .ce[1] = gk104_ce_new, + .ce[2] = gk104_ce_new, // .disp = gk104_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, @@ -1652,9 +1652,9 @@ nve6_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce_new, -// .ce[1] = gk104_ce_new, -// .ce[2] = gk104_ce2_new, + .ce[0] = gk104_ce_new, + .ce[1] = gk104_ce_new, + .ce[2] = gk104_ce_new, // .disp = gk104_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, @@ -1688,9 +1688,9 @@ nve7_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce_new, -// .ce[1] = gk104_ce_new, -// .ce[2] = gk104_ce2_new, + .ce[0] = gk104_ce_new, + .ce[1] = gk104_ce_new, + .ce[2] = gk104_ce_new, // .disp = gk104_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, @@ -1718,7 +1718,7 @@ nvea_chipset = { .pmu = gk20a_pmu_new, .timer = gk20a_timer_new, .volt = gk20a_volt_new, -// .ce[2] = gk104_ce2_new, + .ce[2] = gk104_ce_new, // .dma = gf119_dma_new, // .fifo = gk20a_fifo_new, // .gr = gk20a_gr_new, @@ -1748,9 +1748,9 @@ nvf0_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce_new, -// .ce[1] = gk104_ce_new, -// .ce[2] = gk104_ce2_new, + .ce[0] = gk104_ce_new, + .ce[1] = gk104_ce_new, + .ce[2] = gk104_ce_new, // .disp = gk110_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, @@ -1784,9 +1784,9 @@ nvf1_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce_new, -// .ce[1] = gk104_ce_new, -// .ce[2] = gk104_ce2_new, + .ce[0] = gk104_ce_new, + .ce[1] = gk104_ce_new, + .ce[2] = gk104_ce_new, // .disp = gk110_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, @@ -1820,9 +1820,9 @@ nv106_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce_new, -// .ce[1] = gk104_ce_new, -// .ce[2] = gk104_ce2_new, + .ce[0] = gk104_ce_new, + .ce[1] = gk104_ce_new, + .ce[2] = gk104_ce_new, // .disp = gk110_disp_new, // .dma = gf119_dma_new, // .fifo = gk208_fifo_new, @@ -1855,9 +1855,9 @@ nv108_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce_new, -// .ce[1] = gk104_ce_new, -// .ce[2] = gk104_ce2_new, + .ce[0] = gk104_ce_new, + .ce[1] = gk104_ce_new, + .ce[2] = gk104_ce_new, // .disp = gk110_disp_new, // .dma = gf119_dma_new, // .fifo = gk208_fifo_new, @@ -1889,8 +1889,8 @@ nv117_chipset = { .pmu = gm107_pmu_new, .therm = gm107_therm_new, .timer = gk20a_timer_new, -// .ce[0] = gk104_ce_new, -// .ce[2] = gk104_ce2_new, + .ce[0] = gk104_ce_new, + .ce[2] = gk104_ce_new, // .disp = gm107_disp_new, // .dma = gf119_dma_new, // .fifo = gk208_fifo_new, @@ -1917,9 +1917,9 @@ nv124_chipset = { .mxm = nv50_mxm_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, -// .ce[0] = gm204_ce_new, -// .ce[1] = gm204_ce_new, -// .ce[2] = gm204_ce2_new, + .ce[0] = gm204_ce_new, + .ce[1] = gm204_ce_new, + .ce[2] = gm204_ce_new, // .disp = gm204_disp_new, // .dma = gf119_dma_new, // .fifo = gm204_fifo_new, @@ -1946,9 +1946,9 @@ nv126_chipset = { .mxm = nv50_mxm_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, -// .ce[0] = gm204_ce_new, -// .ce[1] = gm204_ce_new, -// .ce[2] = gm204_ce2_new, + .ce[0] = gm204_ce_new, + .ce[1] = gm204_ce_new, + .ce[2] = gm204_ce_new, // .disp = gm204_disp_new, // .dma = gf119_dma_new, // .fifo = gm204_fifo_new, @@ -1970,7 +1970,7 @@ nv12b_chipset = { .mmu = gf100_mmu_new, .mmu = gf100_mmu_new, .timer = gk20a_timer_new, -// .ce[2] = gm204_ce2_new, + .ce[2] = gm204_ce_new, // .dma = gf119_dma_new, // .fifo = gm20b_fifo_new, // .gr = gm20b_gr_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c index 1162c030f4a234c301676ae8dead8f774704d150..3a9fa9428803ec4bfdf6de4104cf2757ab06ac44 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c @@ -33,9 +33,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk104_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gk104_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass; break; case 0xe7: @@ -44,9 +41,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk104_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gk104_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass; break; case 0xe6: @@ -55,9 +49,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk104_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gk104_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass; break; case 0xea: @@ -65,7 +56,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass; break; case 0xf0: @@ -74,9 +64,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk110_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass; break; case 0xf1: @@ -85,9 +72,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk110b_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass; break; case 0x106: @@ -96,9 +80,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk208_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; break; case 0x108: device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; @@ -106,9 +87,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk208_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; break; default: return -EINVAL; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c index b7b10ca427b83549c9b6960bc1452d0e913c6a36..ec75f91e55cca6252554268daddbf47cc302ea19 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c @@ -36,11 +36,8 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; #if 0 - device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; #endif - device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; #if 0 #endif break; @@ -56,9 +53,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gm204_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass; #if 0 #endif break; @@ -74,9 +68,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gm206_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass; #if 0 #endif break; @@ -86,7 +77,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gm20b_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gm20b_gr_oclass; - device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass; break; default: return -EINVAL;