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提交 e1641531 编写于 作者: S Shawn Guo
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pinctrl: imx: move hard-coding data into device tree 

Currently, all imx pinctrl drivers maintain a big array of struct
imx_pin_reg which hard-codes data like register offset and mux mode
setting for each pin function.  Every time a new imx SoC support is
added, we need to add such a big mount of data.  With moving to single
kernel build, it's only matter of time to be blamed on memory consuming.

With DTC pre-processor support in place, the patch moves all these data
into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and
changing the PIN_FUNC_ID parsing code a little bit.

The pin id gets re-numbered based on mux register offset, or config
register offset if the pin has no mux register, so that kernel can
identify the pin id from register offsets provided by device tree.

As a bonus point of the change, those arbitrary magic numbers standing
for particular PIN_FUNC_ID in device tree sources are now replaced by
macros to improve the readability of dts files.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
上级 36dffd8f
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内联 并排
Showing with 6246 addition and 10841 deletion
Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
浏览文件 @ e1641531
...@@ -24,9 +24,9 @@ Required properties for iomux controller: ...@@ -24,9 +24,9 @@ Required properties for iomux controller:
Required properties for pin configuration node: Required properties for pin configuration node:
- fsl,pins: two integers array, represents a group of pins mux and config - fsl,pins: two integers array, represents a group of pins mux and config
setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
pin working on a specific function, CONFIG is the pad setting value like pin working on a specific function, which consists of a tuple of
pull-up on this pin. Please refer to fsl,<soc>-pinctrl.txt for the valid <mux_reg conf_reg input_reg mux_val input_val>. CONFIG is the pad setting
pins and functions of each SoC. value like pull-up on this pin.
Bits used for CONFIG: Bits used for CONFIG:
NO_PAD_CTL(1 << 31): indicate this pin does not need config. NO_PAD_CTL(1 << 31): indicate this pin does not need config.
......
arch/arm/boot/dts/imx35-pinfunc.h 0 → 100644
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx51-babbage.dts
浏览文件 @ e1641531
...@@ -222,13 +222,13 @@ ...@@ -222,13 +222,13 @@
hog { hog {
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
694 0x20d5 /* MX51_PAD_GPIO1_0__SD1_CD */ MX51_PAD_GPIO1_0__SD1_CD 0x20d5
697 0x20d5 /* MX51_PAD_GPIO1_1__SD1_WP */ MX51_PAD_GPIO1_1__SD1_WP 0x20d5
737 0x100 /* MX51_PAD_GPIO1_5__GPIO1_5 */ MX51_PAD_GPIO1_5__GPIO1_5 0x100
740 0x100 /* MX51_PAD_GPIO1_6__GPIO1_6 */ MX51_PAD_GPIO1_6__GPIO1_6 0x100
121 0x5 /* MX51_PAD_EIM_A27__GPIO2_21 */ MX51_PAD_EIM_A27__GPIO2_21 0x5
402 0x85 /* MX51_PAD_CSPI1_SS0__GPIO4_24 */ MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
405 0x85 /* MX51_PAD_CSPI1_SS1__GPIO4_25 */ MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
>; >;
}; };
}; };
......
arch/arm/boot/dts/imx51-pinfunc.h 0 → 100644
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx51.dtsi
浏览文件 @ e1641531
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
*/ */
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include "imx51-pinfunc.h"
/ { / {
aliases { aliases {
...@@ -251,10 +252,10 @@ ...@@ -251,10 +252,10 @@
audmux { audmux {
pinctrl_audmux_1: audmuxgrp-1 { pinctrl_audmux_1: audmuxgrp-1 {
fsl,pins = < fsl,pins = <
384 0x80000000 /* MX51_PAD_AUD3_BB_TXD__AUD3_TXD */ MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
386 0x80000000 /* MX51_PAD_AUD3_BB_RXD__AUD3_RXD */ MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
389 0x80000000 /* MX51_PAD_AUD3_BB_CK__AUD3_TXC */ MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
391 0x80000000 /* MX51_PAD_AUD3_BB_FS__AUD3_TXFS */ MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
>; >;
}; };
}; };
...@@ -262,46 +263,46 @@ ...@@ -262,46 +263,46 @@
fec { fec {
pinctrl_fec_1: fecgrp-1 { pinctrl_fec_1: fecgrp-1 {
fsl,pins = < fsl,pins = <
128 0x80000000 /* MX51_PAD_EIM_EB2__FEC_MDIO */ MX51_PAD_EIM_EB2__FEC_MDIO 0x80000000
134 0x80000000 /* MX51_PAD_EIM_EB3__FEC_RDATA1 */ MX51_PAD_EIM_EB3__FEC_RDATA1 0x80000000
146 0x80000000 /* MX51_PAD_EIM_CS2__FEC_RDATA2 */ MX51_PAD_EIM_CS2__FEC_RDATA2 0x80000000
152 0x80000000 /* MX51_PAD_EIM_CS3__FEC_RDATA3 */ MX51_PAD_EIM_CS3__FEC_RDATA3 0x80000000
158 0x80000000 /* MX51_PAD_EIM_CS4__FEC_RX_ER */ MX51_PAD_EIM_CS4__FEC_RX_ER 0x80000000
165 0x80000000 /* MX51_PAD_EIM_CS5__FEC_CRS */ MX51_PAD_EIM_CS5__FEC_CRS 0x80000000
206 0x80000000 /* MX51_PAD_NANDF_RB2__FEC_COL */ MX51_PAD_NANDF_RB2__FEC_COL 0x80000000
213 0x80000000 /* MX51_PAD_NANDF_RB3__FEC_RX_CLK */ MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x80000000
293 0x80000000 /* MX51_PAD_NANDF_D9__FEC_RDATA0 */ MX51_PAD_NANDF_D9__FEC_RDATA0 0x80000000
298 0x80000000 /* MX51_PAD_NANDF_D8__FEC_TDATA0 */ MX51_PAD_NANDF_D8__FEC_TDATA0 0x80000000
225 0x80000000 /* MX51_PAD_NANDF_CS2__FEC_TX_ER */ MX51_PAD_NANDF_CS2__FEC_TX_ER 0x80000000
231 0x80000000 /* MX51_PAD_NANDF_CS3__FEC_MDC */ MX51_PAD_NANDF_CS3__FEC_MDC 0x80000000
237 0x80000000 /* MX51_PAD_NANDF_CS4__FEC_TDATA1 */ MX51_PAD_NANDF_CS4__FEC_TDATA1 0x80000000
243 0x80000000 /* MX51_PAD_NANDF_CS5__FEC_TDATA2 */ MX51_PAD_NANDF_CS5__FEC_TDATA2 0x80000000
250 0x80000000 /* MX51_PAD_NANDF_CS6__FEC_TDATA3 */ MX51_PAD_NANDF_CS6__FEC_TDATA3 0x80000000
255 0x80000000 /* MX51_PAD_NANDF_CS7__FEC_TX_EN */ MX51_PAD_NANDF_CS7__FEC_TX_EN 0x80000000
260 0x80000000 /* MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK */ MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x80000000
>; >;
}; };
pinctrl_fec_2: fecgrp-2 { pinctrl_fec_2: fecgrp-2 {
fsl,pins = < fsl,pins = <
589 0x80000000 /* MX51_PAD_DI_GP3__FEC_TX_ER */ MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000
592 0x80000000 /* MX51_PAD_DI2_PIN4__FEC_CRS */ MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000
594 0x80000000 /* MX51_PAD_DI2_PIN2__FEC_MDC */ MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000
596 0x80000000 /* MX51_PAD_DI2_PIN3__FEC_MDIO */ MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000
598 0x80000000 /* MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 */ MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000
602 0x80000000 /* MX51_PAD_DI_GP4__FEC_RDATA2 */ MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000
604 0x80000000 /* MX51_PAD_DISP2_DAT0__FEC_RDATA3 */ MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000
609 0x80000000 /* MX51_PAD_DISP2_DAT1__FEC_RX_ER */ MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000
618 0x80000000 /* MX51_PAD_DISP2_DAT6__FEC_TDATA1 */ MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000
623 0x80000000 /* MX51_PAD_DISP2_DAT7__FEC_TDATA2 */ MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000
628 0x80000000 /* MX51_PAD_DISP2_DAT8__FEC_TDATA3 */ MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000
634 0x80000000 /* MX51_PAD_DISP2_DAT9__FEC_TX_EN */ MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000
639 0x80000000 /* MX51_PAD_DISP2_DAT10__FEC_COL */ MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000
644 0x80000000 /* MX51_PAD_DISP2_DAT11__FEC_RX_CLK */ MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000
649 0x80000000 /* MX51_PAD_DISP2_DAT12__FEC_RX_DV */ MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000
653 0x80000000 /* MX51_PAD_DISP2_DAT13__FEC_TX_CLK */ MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000
657 0x80000000 /* MX51_PAD_DISP2_DAT14__FEC_RDATA0 */ MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000
662 0x80000000 /* MX51_PAD_DISP2_DAT15__FEC_TDATA0 */ MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000
>; >;
}; };
}; };
...@@ -309,9 +310,9 @@ ...@@ -309,9 +310,9 @@
ecspi1 { ecspi1 {
pinctrl_ecspi1_1: ecspi1grp-1 { pinctrl_ecspi1_1: ecspi1grp-1 {
fsl,pins = < fsl,pins = <
398 0x185 /* MX51_PAD_CSPI1_MISO__ECSPI1_MISO */ MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
394 0x185 /* MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI */ MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
409 0x185 /* MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK */ MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
>; >;
}; };
}; };
...@@ -319,12 +320,12 @@ ...@@ -319,12 +320,12 @@
esdhc1 { esdhc1 {
pinctrl_esdhc1_1: esdhc1grp-1 { pinctrl_esdhc1_1: esdhc1grp-1 {
fsl,pins = < fsl,pins = <
666 0x400020d5 /* MX51_PAD_SD1_CMD__SD1_CMD */ MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
669 0x20d5 /* MX51_PAD_SD1_CLK__SD1_CLK */ MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
672 0x20d5 /* MX51_PAD_SD1_DATA0__SD1_DATA0 */ MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
678 0x20d5 /* MX51_PAD_SD1_DATA1__SD1_DATA1 */ MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
684 0x20d5 /* MX51_PAD_SD1_DATA2__SD1_DATA2 */ MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
691 0x20d5 /* MX51_PAD_SD1_DATA3__SD1_DATA3 */ MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
>; >;
}; };
}; };
...@@ -332,12 +333,12 @@ ...@@ -332,12 +333,12 @@
esdhc2 { esdhc2 {
pinctrl_esdhc2_1: esdhc2grp-1 { pinctrl_esdhc2_1: esdhc2grp-1 {
fsl,pins = < fsl,pins = <
704 0x400020d5 /* MX51_PAD_SD2_CMD__SD2_CMD */ MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5
707 0x20d5 /* MX51_PAD_SD2_CLK__SD2_CLK */ MX51_PAD_SD2_CLK__SD2_CLK 0x20d5
710 0x20d5 /* MX51_PAD_SD2_DATA0__SD2_DATA0 */ MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5
712 0x20d5 /* MX51_PAD_SD2_DATA1__SD2_DATA1 */ MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5
715 0x20d5 /* MX51_PAD_SD2_DATA2__SD2_DATA2 */ MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5
719 0x20d5 /* MX51_PAD_SD2_DATA3__SD2_DATA3 */ MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
>; >;
}; };
}; };
...@@ -345,8 +346,8 @@ ...@@ -345,8 +346,8 @@
i2c2 { i2c2 {
pinctrl_i2c2_1: i2c2grp-1 { pinctrl_i2c2_1: i2c2grp-1 {
fsl,pins = < fsl,pins = <
449 0x400001ed /* MX51_PAD_KEY_COL4__I2C2_SCL */ MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
454 0x400001ed /* MX51_PAD_KEY_COL5__I2C2_SDA */ MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
>; >;
}; };
}; };
...@@ -354,32 +355,32 @@ ...@@ -354,32 +355,32 @@
ipu_disp1 { ipu_disp1 {
pinctrl_ipu_disp1_1: ipudisp1grp-1 { pinctrl_ipu_disp1_1: ipudisp1grp-1 {
fsl,pins = < fsl,pins = <
528 0x5 /* MX51_PAD_DISP1_DAT0__DISP1_DAT0 */ MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
529 0x5 /* MX51_PAD_DISP1_DAT1__DISP1_DAT1 */ MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
530 0x5 /* MX51_PAD_DISP1_DAT2__DISP1_DAT2 */ MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
531 0x5 /* MX51_PAD_DISP1_DAT3__DISP1_DAT3 */ MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
532 0x5 /* MX51_PAD_DISP1_DAT4__DISP1_DAT4 */ MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
533 0x5 /* MX51_PAD_DISP1_DAT5__DISP1_DAT5 */ MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
535 0x5 /* MX51_PAD_DISP1_DAT6__DISP1_DAT6 */ MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
537 0x5 /* MX51_PAD_DISP1_DAT7__DISP1_DAT7 */ MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
539 0x5 /* MX51_PAD_DISP1_DAT8__DISP1_DAT8 */ MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
541 0x5 /* MX51_PAD_DISP1_DAT9__DISP1_DAT9 */ MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
543 0x5 /* MX51_PAD_DISP1_DAT10__DISP1_DAT10 */ MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
545 0x5 /* MX51_PAD_DISP1_DAT11__DISP1_DAT11 */ MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
547 0x5 /* MX51_PAD_DISP1_DAT12__DISP1_DAT12 */ MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
549 0x5 /* MX51_PAD_DISP1_DAT13__DISP1_DAT13 */ MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
551 0x5 /* MX51_PAD_DISP1_DAT14__DISP1_DAT14 */ MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
553 0x5 /* MX51_PAD_DISP1_DAT15__DISP1_DAT15 */ MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
555 0x5 /* MX51_PAD_DISP1_DAT16__DISP1_DAT16 */ MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
557 0x5 /* MX51_PAD_DISP1_DAT17__DISP1_DAT17 */ MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
559 0x5 /* MX51_PAD_DISP1_DAT18__DISP1_DAT18 */ MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
563 0x5 /* MX51_PAD_DISP1_DAT19__DISP1_DAT19 */ MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
567 0x5 /* MX51_PAD_DISP1_DAT20__DISP1_DAT20 */ MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
571 0x5 /* MX51_PAD_DISP1_DAT21__DISP1_DAT21 */ MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
575 0x5 /* MX51_PAD_DISP1_DAT22__DISP1_DAT22 */ MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
579 0x5 /* MX51_PAD_DISP1_DAT23__DISP1_DAT23 */ MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
584 0x5 /* MX51_PAD_DI1_PIN2__DI1_PIN2 (hsync) */ MX51_PAD_DI1_PIN2__DI1_PIN2 0x5 /* hsync */
583 0x5 /* MX51_PAD_DI1_PIN3__DI1_PIN3 (vsync) */ MX51_PAD_DI1_PIN3__DI1_PIN3 0x5 /* vsync */
>; >;
}; };
}; };
...@@ -387,26 +388,26 @@ ...@@ -387,26 +388,26 @@
ipu_disp2 { ipu_disp2 {
pinctrl_ipu_disp2_1: ipudisp2grp-1 { pinctrl_ipu_disp2_1: ipudisp2grp-1 {
fsl,pins = < fsl,pins = <
603 0x5 /* MX51_PAD_DISP2_DAT0__DISP2_DAT0 */ MX51_PAD_DISP2_DAT0__DISP2_DAT0 0x5
608 0x5 /* MX51_PAD_DISP2_DAT1__DISP2_DAT1 */ MX51_PAD_DISP2_DAT1__DISP2_DAT1 0x5
613 0x5 /* MX51_PAD_DISP2_DAT2__DISP2_DAT2 */ MX51_PAD_DISP2_DAT2__DISP2_DAT2 0x5
614 0x5 /* MX51_PAD_DISP2_DAT3__DISP2_DAT3 */ MX51_PAD_DISP2_DAT3__DISP2_DAT3 0x5
615 0x5 /* MX51_PAD_DISP2_DAT4__DISP2_DAT4 */ MX51_PAD_DISP2_DAT4__DISP2_DAT4 0x5
616 0x5 /* MX51_PAD_DISP2_DAT5__DISP2_DAT5 */ MX51_PAD_DISP2_DAT5__DISP2_DAT5 0x5
617 0x5 /* MX51_PAD_DISP2_DAT6__DISP2_DAT6 */ MX51_PAD_DISP2_DAT6__DISP2_DAT6 0x5
622 0x5 /* MX51_PAD_DISP2_DAT7__DISP2_DAT7 */ MX51_PAD_DISP2_DAT7__DISP2_DAT7 0x5
627 0x5 /* MX51_PAD_DISP2_DAT8__DISP2_DAT8 */ MX51_PAD_DISP2_DAT8__DISP2_DAT8 0x5
633 0x5 /* MX51_PAD_DISP2_DAT9__DISP2_DAT9 */ MX51_PAD_DISP2_DAT9__DISP2_DAT9 0x5
637 0x5 /* MX51_PAD_DISP2_DAT10__DISP2_DAT10 */ MX51_PAD_DISP2_DAT10__DISP2_DAT10 0x5
643 0x5 /* MX51_PAD_DISP2_DAT11__DISP2_DAT11 */ MX51_PAD_DISP2_DAT11__DISP2_DAT11 0x5
648 0x5 /* MX51_PAD_DISP2_DAT12__DISP2_DAT12 */ MX51_PAD_DISP2_DAT12__DISP2_DAT12 0x5
652 0x5 /* MX51_PAD_DISP2_DAT13__DISP2_DAT13 */ MX51_PAD_DISP2_DAT13__DISP2_DAT13 0x5
656 0x5 /* MX51_PAD_DISP2_DAT14__DISP2_DAT14 */ MX51_PAD_DISP2_DAT14__DISP2_DAT14 0x5
661 0x5 /* MX51_PAD_DISP2_DAT15__DISP2_DAT15 */ MX51_PAD_DISP2_DAT15__DISP2_DAT15 0x5
593 0x5 /* MX51_PAD_DI2_PIN2__DI2_PIN2 (hsync) */ MX51_PAD_DI2_PIN2__DI2_PIN2 0x5 /* hsync */
595 0x5 /* MX51_PAD_DI2_PIN3__DI2_PIN3 (vsync) */ MX51_PAD_DI2_PIN3__DI2_PIN3 0x5 /* vsync */
597 0x5 /* MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK */ MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 0x5
599 0x5 /* MX51_PAD_DI_GP4__DI2_PIN15 */ MX51_PAD_DI_GP4__DI2_PIN15 0x5
>; >;
}; };
}; };
...@@ -414,10 +415,10 @@ ...@@ -414,10 +415,10 @@
uart1 { uart1 {
pinctrl_uart1_1: uart1grp-1 { pinctrl_uart1_1: uart1grp-1 {
fsl,pins = < fsl,pins = <
413 0x1c5 /* MX51_PAD_UART1_RXD__UART1_RXD */ MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
416 0x1c5 /* MX51_PAD_UART1_TXD__UART1_TXD */ MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
418 0x1c5 /* MX51_PAD_UART1_RTS__UART1_RTS */ MX51_PAD_UART1_RTS__UART1_RTS 0x1c5
420 0x1c5 /* MX51_PAD_UART1_CTS__UART1_CTS */ MX51_PAD_UART1_CTS__UART1_CTS 0x1c5
>; >;
}; };
}; };
...@@ -425,8 +426,8 @@ ...@@ -425,8 +426,8 @@
uart2 { uart2 {
pinctrl_uart2_1: uart2grp-1 { pinctrl_uart2_1: uart2grp-1 {
fsl,pins = < fsl,pins = <
423 0x1c5 /* MX51_PAD_UART2_RXD__UART2_RXD */ MX51_PAD_UART2_RXD__UART2_RXD 0x1c5
426 0x1c5 /* MX51_PAD_UART2_TXD__UART2_TXD */ MX51_PAD_UART2_TXD__UART2_TXD 0x1c5
>; >;
}; };
}; };
...@@ -434,17 +435,17 @@ ...@@ -434,17 +435,17 @@
uart3 { uart3 {
pinctrl_uart3_1: uart3grp-1 { pinctrl_uart3_1: uart3grp-1 {
fsl,pins = < fsl,pins = <
54 0x1c5 /* MX51_PAD_EIM_D25__UART3_RXD */ MX51_PAD_EIM_D25__UART3_RXD 0x1c5
59 0x1c5 /* MX51_PAD_EIM_D26__UART3_TXD */ MX51_PAD_EIM_D26__UART3_TXD 0x1c5
65 0x1c5 /* MX51_PAD_EIM_D27__UART3_RTS */ MX51_PAD_EIM_D27__UART3_RTS 0x1c5
49 0x1c5 /* MX51_PAD_EIM_D24__UART3_CTS */ MX51_PAD_EIM_D24__UART3_CTS 0x1c5
>; >;
}; };
pinctrl_uart3_2: uart3grp-2 { pinctrl_uart3_2: uart3grp-2 {
fsl,pins = < fsl,pins = <
434 0x1c5 /* MX51_PAD_UART3_RXD__UART3_RXD */ MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
430 0x1c5 /* MX51_PAD_UART3_TXD__UART3_TXD */ MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
>; >;
}; };
}; };
...@@ -452,14 +453,14 @@ ...@@ -452,14 +453,14 @@
kpp { kpp {
pinctrl_kpp_1: kppgrp-1 { pinctrl_kpp_1: kppgrp-1 {
fsl,pins = < fsl,pins = <
438 0xe0 /* MX51_PAD_KEY_ROW0__KEY_ROW0 */ MX51_PAD_KEY_ROW0__KEY_ROW0 0xe0
439 0xe0 /* MX51_PAD_KEY_ROW1__KEY_ROW1 */ MX51_PAD_KEY_ROW1__KEY_ROW1 0xe0
440 0xe0 /* MX51_PAD_KEY_ROW2__KEY_ROW2 */ MX51_PAD_KEY_ROW2__KEY_ROW2 0xe0
441 0xe0 /* MX51_PAD_KEY_ROW3__KEY_ROW3 */ MX51_PAD_KEY_ROW3__KEY_ROW3 0xe0
442 0xe8 /* MX51_PAD_KEY_COL0__KEY_COL0 */ MX51_PAD_KEY_COL0__KEY_COL0 0xe8
444 0xe8 /* MX51_PAD_KEY_COL1__KEY_COL1 */ MX51_PAD_KEY_COL1__KEY_COL1 0xe8
446 0xe8 /* MX51_PAD_KEY_COL2__KEY_COL2 */ MX51_PAD_KEY_COL2__KEY_COL2 0xe8
448 0xe8 /* MX51_PAD_KEY_COL3__KEY_COL3 */ MX51_PAD_KEY_COL3__KEY_COL3 0xe8
>; >;
}; };
}; };
......
arch/arm/boot/dts/imx53-ard.dts
浏览文件 @ e1641531
...@@ -112,40 +112,40 @@ ...@@ -112,40 +112,40 @@
hog { hog {
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
1077 0x80000000 /* MX53_PAD_GPIO_1__GPIO1_1 */ MX53_PAD_GPIO_1__GPIO1_1 0x80000000
1085 0x80000000 /* MX53_PAD_GPIO_9__GPIO1_9 */ MX53_PAD_GPIO_9__GPIO1_9 0x80000000
486 0x80000000 /* MX53_PAD_EIM_EB3__GPIO2_31 */ MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
739 0x80000000 /* MX53_PAD_GPIO_10__GPIO4_0 */ MX53_PAD_GPIO_10__GPIO4_0 0x80000000
218 0x80000000 /* MX53_PAD_DISP0_DAT16__GPIO5_10 */ MX53_PAD_DISP0_DAT16__GPIO5_10 0x80000000
226 0x80000000 /* MX53_PAD_DISP0_DAT17__GPIO5_11 */ MX53_PAD_DISP0_DAT17__GPIO5_11 0x80000000
233 0x80000000 /* MX53_PAD_DISP0_DAT18__GPIO5_12 */ MX53_PAD_DISP0_DAT18__GPIO5_12 0x80000000
241 0x80000000 /* MX53_PAD_DISP0_DAT19__GPIO5_13 */ MX53_PAD_DISP0_DAT19__GPIO5_13 0x80000000
429 0x80000000 /* MX53_PAD_EIM_D16__EMI_WEIM_D_16 */ MX53_PAD_EIM_D16__EMI_WEIM_D_16 0x80000000
435 0x80000000 /* MX53_PAD_EIM_D17__EMI_WEIM_D_17 */ MX53_PAD_EIM_D17__EMI_WEIM_D_17 0x80000000
441 0x80000000 /* MX53_PAD_EIM_D18__EMI_WEIM_D_18 */ MX53_PAD_EIM_D18__EMI_WEIM_D_18 0x80000000
448 0x80000000 /* MX53_PAD_EIM_D19__EMI_WEIM_D_19 */ MX53_PAD_EIM_D19__EMI_WEIM_D_19 0x80000000
456 0x80000000 /* MX53_PAD_EIM_D20__EMI_WEIM_D_20 */ MX53_PAD_EIM_D20__EMI_WEIM_D_20 0x80000000
464 0x80000000 /* MX53_PAD_EIM_D21__EMI_WEIM_D_21 */ MX53_PAD_EIM_D21__EMI_WEIM_D_21 0x80000000
471 0x80000000 /* MX53_PAD_EIM_D22__EMI_WEIM_D_22 */ MX53_PAD_EIM_D22__EMI_WEIM_D_22 0x80000000
477 0x80000000 /* MX53_PAD_EIM_D23__EMI_WEIM_D_23 */ MX53_PAD_EIM_D23__EMI_WEIM_D_23 0x80000000
492 0x80000000 /* MX53_PAD_EIM_D24__EMI_WEIM_D_24 */ MX53_PAD_EIM_D24__EMI_WEIM_D_24 0x80000000
500 0x80000000 /* MX53_PAD_EIM_D25__EMI_WEIM_D_25 */ MX53_PAD_EIM_D25__EMI_WEIM_D_25 0x80000000
508 0x80000000 /* MX53_PAD_EIM_D26__EMI_WEIM_D_26 */ MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x80000000
516 0x80000000 /* MX53_PAD_EIM_D27__EMI_WEIM_D_27 */ MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x80000000
524 0x80000000 /* MX53_PAD_EIM_D28__EMI_WEIM_D_28 */ MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x80000000
532 0x80000000 /* MX53_PAD_EIM_D29__EMI_WEIM_D_29 */ MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x80000000
540 0x80000000 /* MX53_PAD_EIM_D30__EMI_WEIM_D_30 */ MX53_PAD_EIM_D30__EMI_WEIM_D_30 0x80000000
548 0x80000000 /* MX53_PAD_EIM_D31__EMI_WEIM_D_31 */ MX53_PAD_EIM_D31__EMI_WEIM_D_31 0x80000000
637 0x80000000 /* MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 */ MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000
642 0x80000000 /* MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 */ MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000
647 0x80000000 /* MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 */ MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000
652 0x80000000 /* MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 */ MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000
657 0x80000000 /* MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 */ MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000
662 0x80000000 /* MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 */ MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000
667 0x80000000 /* MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 */ MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000
611 0x80000000 /* MX53_PAD_EIM_OE__EMI_WEIM_OE */ MX53_PAD_EIM_OE__EMI_WEIM_OE 0x80000000
616 0x80000000 /* MX53_PAD_EIM_RW__EMI_WEIM_RW */ MX53_PAD_EIM_RW__EMI_WEIM_RW 0x80000000
607 0x80000000 /* MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 */ MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x80000000
>; >;
}; };
}; };
......
arch/arm/boot/dts/imx53-evk.dts
浏览文件 @ e1641531
...@@ -82,14 +82,14 @@ ...@@ -82,14 +82,14 @@
hog { hog {
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */ MX53_PAD_EIM_EB2__GPIO2_30 0x80000000
449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */ MX53_PAD_EIM_D19__GPIO3_19 0x80000000
693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */ MX53_PAD_EIM_DA11__GPIO3_11 0x80000000
697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */ MX53_PAD_EIM_DA12__GPIO3_12 0x80000000
701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */ MX53_PAD_EIM_DA13__GPIO3_13 0x80000000
705 0x80000000 /* MX53_PAD_EIM_DA14__GPIO3_14 */ MX53_PAD_EIM_DA14__GPIO3_14 0x80000000
868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */ MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */ MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000
>; >;
}; };
}; };
......
arch/arm/boot/dts/imx53-mba53.dts
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx53-pinfunc.h 0 → 100644
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx53-qsb.dts
浏览文件 @ e1641531
...@@ -110,21 +110,21 @@ ...@@ -110,21 +110,21 @@
hog { hog {
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
1071 0x80000000 /* MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK */ MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
1141 0x80000000 /* MX53_PAD_GPIO_8__GPIO1_8 */ MX53_PAD_GPIO_8__GPIO1_8 0x80000000
982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */ MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */ MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000
693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */ MX53_PAD_EIM_DA11__GPIO3_11 0x80000000
697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */ MX53_PAD_EIM_DA12__GPIO3_12 0x80000000
701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */ MX53_PAD_EIM_DA13__GPIO3_13 0x80000000
868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */ MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */ MX53_PAD_GPIO_16__GPIO7_11 0x80000000
>; >;
}; };
led_pin_gpio7_7: led_gpio7_7@0 { led_pin_gpio7_7: led_gpio7_7@0 {
fsl,pins = < fsl,pins = <
873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */ MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000
>; >;
}; };
}; };
......
arch/arm/boot/dts/imx53-smd.dts
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx53-tqma53.dtsi
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx53.dtsi
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx6q-arm2.dts
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx6q-pinfunc.h 0 → 100644
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx6q-sabreauto.dts
浏览文件 @ e1641531
...@@ -29,8 +29,8 @@ ...@@ -29,8 +29,8 @@
hog { hog {
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */ MX6Q_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
13 0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */ MX6Q_PAD_SD2_DAT2__GPIO1_IO13 0x80000000
>; >;
}; };
}; };
......
arch/arm/boot/dts/imx6q-sabresd.dts
浏览文件 @ e1641531
此差异已折叠。
arch/arm/boot/dts/imx6q.dtsi
浏览文件 @ e1641531
此差异已折叠。
drivers/pinctrl/pinctrl-imx.c
浏览文件 @ e1641531
此差异已折叠。
drivers/pinctrl/pinctrl-imx.h
浏览文件 @ e1641531
此差异已折叠。
drivers/pinctrl/pinctrl-imx35.c
浏览文件 @ e1641531
此差异已折叠。
drivers/pinctrl/pinctrl-imx51.c
浏览文件 @ e1641531
此差异已折叠。
drivers/pinctrl/pinctrl-imx53.c
浏览文件 @ e1641531
此差异已折叠。
drivers/pinctrl/pinctrl-imx6q.c
浏览文件 @ e1641531
此差异已折叠。
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