!94 [openEuler-1.0-LTS] rtc: Fix set RTC time delay 500ms on some Zhaoxin SOCs

Merge Pull Request from: @leoliu-oc 
 
When the RTC divider is changed from reset to an operating time base, the first update cycle should be 500ms later. But on some Zhaoxin SOCs, this first update cycle is one second later. So set RTC time on these Zhaoxin SOCs will causing 500ms delay. Skip setup RTC divider on these SOCs in mc146818_set_time to fix it.

### Issue
https://gitee.com/openeuler/kernel/issues/I54V04

### Test
```shell
hwclock –s    #Synchronize RTC to system time
hwclock –w    #Write the system time in RTC
adjtimex –c    #The average value of the "system-cmos" column should not exceed 0.5
```

Known Issue
N/A

Default config change
N/A 
 
Link:https://gitee.com/openeuler/kernel/pulls/94 
Reviewed-by: Laibin Qiu <qiulaibin@huawei.com> 
Signed-off-by: Xie XiuQi <xiexiuqi@huawei.com> 

drivers/rtc/rtc-mc146818-lib.c

@@ -7,6 +7,23 @@
 #include <linux/acpi.h>
 #endif
 
+#ifdef CONFIG_X86
+static inline bool follow_mc146818_divider_reset(void)
+{
+	if ((boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR ||
+		boot_cpu_data.x86_vendor == X86_VENDOR_ZHAOXIN) &&
+		(boot_cpu_data.x86 <= 7 && boot_cpu_data.x86_model <= 59)) {
+		return false;
+	}
+	return true;
+}
+#else
+static inline bool follow_mc146818_divider_reset(void)
+{
+	return true;
+}
+#endif
+
 /*
  * Returns true if a clock update is in progress
  */
@@ -170,8 +187,10 @@ int mc146818_set_time(struct rtc_time *time)
 
 	save_control = CMOS_READ(RTC_CONTROL);
 	CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
-	save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
-	CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
+	if (follow_mc146818_divider_reset()) {
+		save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
+		CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
+	}
 
 #ifdef CONFIG_MACH_DECSTATION
 	CMOS_WRITE(real_yrs, RTC_DEC_YEAR);
@@ -189,7 +208,8 @@ int mc146818_set_time(struct rtc_time *time)
 #endif
 
 	CMOS_WRITE(save_control, RTC_CONTROL);
-	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
+	if (follow_mc146818_divider_reset())
+		CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
 
 	spin_unlock_irqrestore(&rtc_lock, flags);