scsi: hisi_sas: queue debugfs dump work before FLR

driver inclusion
category: bugfix
bugzilla: NA
CVE: NA

Debugfs dump should be executed before FLR run for we have to dump some
registers before reset by FLR. So it's wrong to queue debugfs dump work
when running FLR work for these two work queue in same workqueue. It
mean that Debugfs dump work is alway execute after FLR and get data
which is reset.
Signed-off-by: NYang Xingui <yangxingui@huawei.com>
Reviewed-by: NKangfenglong <kangfenglong@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

drivers/scsi/hisi_sas/hisi_sas.h

@@ -322,6 +322,7 @@ struct hisi_sas_hw {
 	void (*snapshot_restore)(struct hisi_hba *hisi_hba);
 	const struct cpumask *(*get_managed_irq_aff)(struct hisi_hba
 			*hisi_hba, int queue);
+	void (*debugfs_work_handler)(struct work_struct *work);
 	int max_command_entries;
 	int complete_hdr_size;
 	struct scsi_host_template *sht;

drivers/scsi/hisi_sas/hisi_sas_main.c

@@ -1601,16 +1601,16 @@ static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
 	struct Scsi_Host *shost = hisi_hba->shost;
 	int rc;
 
-	if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct &&
-	    !hisi_hba->debugfs_dump_dentry)
-		queue_work(hisi_hba->wq, &hisi_hba->debugfs_work);
-
 	if (!hisi_hba->hw->soft_reset)
 		return -EINVAL;
 
 	if (test_and_set_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
 		return -EPERM;
 
+	if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct &&
+	    !hisi_hba->debugfs_dump_dentry)
+		hisi_hba->hw->debugfs_work_handler(&hisi_hba->debugfs_work);
+
 	dev_info(dev, "controller resetting...\n");
 	hisi_sas_controller_reset_prepare(hisi_hba);
 

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

@@ -3332,6 +3332,7 @@ static const struct hisi_sas_hw hisi_sas_v3_hw = {
 	.snapshot_restore = debugfs_snapshot_restore_v3_hw,
 	.set_bist = debugfs_set_bist_v3_hw,
 	.get_managed_irq_aff = get_managed_irq_aff_v3_hw,
+	.debugfs_work_handler = hisi_sas_debugfs_work_handler,
 };
 
 static struct Scsi_Host *