提交 d66a4c7f 编写于 作者: N Niklas Schnelle 提交者: Vasily Gorbik

s390/pci: use register pair instead of register asm

Reviewed-by: NHeiko Carstens <hca@linux.ibm.com>
Signed-off-by: NNiklas Schnelle <schnelle@linux.ibm.com>
Signed-off-by: NVasily Gorbik <gor@linux.ibm.com>
上级 f3827dc6
...@@ -63,16 +63,15 @@ u8 zpci_mod_fc(u64 req, struct zpci_fib *fib, u8 *status) ...@@ -63,16 +63,15 @@ u8 zpci_mod_fc(u64 req, struct zpci_fib *fib, u8 *status)
/* Refresh PCI Translations */ /* Refresh PCI Translations */
static inline u8 __rpcit(u64 fn, u64 addr, u64 range, u8 *status) static inline u8 __rpcit(u64 fn, u64 addr, u64 range, u8 *status)
{ {
register u64 __addr asm("2") = addr; union register_pair addr_range = {.even = addr, .odd = range};
register u64 __range asm("3") = range;
u8 cc; u8 cc;
asm volatile ( asm volatile (
" .insn rre,0xb9d30000,%[fn],%[addr]\n" " .insn rre,0xb9d30000,%[fn],%[addr_range]\n"
" ipm %[cc]\n" " ipm %[cc]\n"
" srl %[cc],28\n" " srl %[cc],28\n"
: [cc] "=d" (cc), [fn] "+d" (fn) : [cc] "=d" (cc), [fn] "+d" (fn)
: [addr] "d" (__addr), "d" (__range) : [addr_range] "d" (addr_range.pair)
: "cc"); : "cc");
*status = fn >> 24 & 0xff; *status = fn >> 24 & 0xff;
return cc; return cc;
...@@ -113,21 +112,19 @@ int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib) ...@@ -113,21 +112,19 @@ int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib)
/* PCI Load */ /* PCI Load */
static inline int ____pcilg(u64 *data, u64 req, u64 offset, u8 *status) static inline int ____pcilg(u64 *data, u64 req, u64 offset, u8 *status)
{ {
register u64 __req asm("2") = req; union register_pair req_off = {.even = req, .odd = offset};
register u64 __offset asm("3") = offset;
int cc = -ENXIO; int cc = -ENXIO;
u64 __data; u64 __data;
asm volatile ( asm volatile (
" .insn rre,0xb9d20000,%[data],%[req]\n" " .insn rre,0xb9d20000,%[data],%[req_off]\n"
"0: ipm %[cc]\n" "0: ipm %[cc]\n"
" srl %[cc],28\n" " srl %[cc],28\n"
"1:\n" "1:\n"
EX_TABLE(0b, 1b) EX_TABLE(0b, 1b)
: [cc] "+d" (cc), [data] "=d" (__data), [req] "+d" (__req) : [cc] "+d" (cc), [data] "=d" (__data),
: "d" (__offset) [req_off] "+&d" (req_off.pair) :: "cc");
: "cc"); *status = req_off.even >> 24 & 0xff;
*status = __req >> 24 & 0xff;
*data = __data; *data = __data;
return cc; return cc;
} }
...@@ -173,21 +170,19 @@ static inline int zpci_load_fh(u64 *data, const volatile void __iomem *addr, ...@@ -173,21 +170,19 @@ static inline int zpci_load_fh(u64 *data, const volatile void __iomem *addr,
static inline int __pcilg_mio(u64 *data, u64 ioaddr, u64 len, u8 *status) static inline int __pcilg_mio(u64 *data, u64 ioaddr, u64 len, u8 *status)
{ {
register u64 addr asm("2") = ioaddr; union register_pair ioaddr_len = {.even = ioaddr, .odd = len};
register u64 r3 asm("3") = len;
int cc = -ENXIO; int cc = -ENXIO;
u64 __data; u64 __data;
asm volatile ( asm volatile (
" .insn rre,0xb9d60000,%[data],%[ioaddr]\n" " .insn rre,0xb9d60000,%[data],%[ioaddr_len]\n"
"0: ipm %[cc]\n" "0: ipm %[cc]\n"
" srl %[cc],28\n" " srl %[cc],28\n"
"1:\n" "1:\n"
EX_TABLE(0b, 1b) EX_TABLE(0b, 1b)
: [cc] "+d" (cc), [data] "=d" (__data), "+d" (r3) : [cc] "+d" (cc), [data] "=d" (__data),
: [ioaddr] "d" (addr) [ioaddr_len] "+&d" (ioaddr_len.pair) :: "cc");
: "cc"); *status = ioaddr_len.odd >> 24 & 0xff;
*status = r3 >> 24 & 0xff;
*data = __data; *data = __data;
return cc; return cc;
} }
...@@ -211,20 +206,19 @@ EXPORT_SYMBOL_GPL(zpci_load); ...@@ -211,20 +206,19 @@ EXPORT_SYMBOL_GPL(zpci_load);
/* PCI Store */ /* PCI Store */
static inline int __pcistg(u64 data, u64 req, u64 offset, u8 *status) static inline int __pcistg(u64 data, u64 req, u64 offset, u8 *status)
{ {
register u64 __req asm("2") = req; union register_pair req_off = {.even = req, .odd = offset};
register u64 __offset asm("3") = offset;
int cc = -ENXIO; int cc = -ENXIO;
asm volatile ( asm volatile (
" .insn rre,0xb9d00000,%[data],%[req]\n" " .insn rre,0xb9d00000,%[data],%[req_off]\n"
"0: ipm %[cc]\n" "0: ipm %[cc]\n"
" srl %[cc],28\n" " srl %[cc],28\n"
"1:\n" "1:\n"
EX_TABLE(0b, 1b) EX_TABLE(0b, 1b)
: [cc] "+d" (cc), [req] "+d" (__req) : [cc] "+d" (cc), [req_off] "+&d" (req_off.pair)
: "d" (__offset), [data] "d" (data) : [data] "d" (data)
: "cc"); : "cc");
*status = __req >> 24 & 0xff; *status = req_off.even >> 24 & 0xff;
return cc; return cc;
} }
...@@ -257,20 +251,19 @@ static inline int zpci_store_fh(const volatile void __iomem *addr, u64 data, ...@@ -257,20 +251,19 @@ static inline int zpci_store_fh(const volatile void __iomem *addr, u64 data,
static inline int __pcistg_mio(u64 data, u64 ioaddr, u64 len, u8 *status) static inline int __pcistg_mio(u64 data, u64 ioaddr, u64 len, u8 *status)
{ {
register u64 addr asm("2") = ioaddr; union register_pair ioaddr_len = {.even = ioaddr, .odd = len};
register u64 r3 asm("3") = len;
int cc = -ENXIO; int cc = -ENXIO;
asm volatile ( asm volatile (
" .insn rre,0xb9d40000,%[data],%[ioaddr]\n" " .insn rre,0xb9d40000,%[data],%[ioaddr_len]\n"
"0: ipm %[cc]\n" "0: ipm %[cc]\n"
" srl %[cc],28\n" " srl %[cc],28\n"
"1:\n" "1:\n"
EX_TABLE(0b, 1b) EX_TABLE(0b, 1b)
: [cc] "+d" (cc), "+d" (r3) : [cc] "+d" (cc), [ioaddr_len] "+&d" (ioaddr_len.pair)
: [data] "d" (data), [ioaddr] "d" (addr) : [data] "d" (data)
: "cc"); : "cc", "memory");
*status = r3 >> 24 & 0xff; *status = ioaddr_len.odd >> 24 & 0xff;
return cc; return cc;
} }
......
...@@ -49,8 +49,7 @@ static inline int __pcistg_mio_inuser( ...@@ -49,8 +49,7 @@ static inline int __pcistg_mio_inuser(
void __iomem *ioaddr, const void __user *src, void __iomem *ioaddr, const void __user *src,
u64 ulen, u8 *status) u64 ulen, u8 *status)
{ {
register u64 addr asm("2") = (u64 __force) ioaddr; union register_pair ioaddr_len = {.even = (u64 __force)ioaddr, .odd = ulen};
register u64 len asm("3") = ulen;
int cc = -ENXIO; int cc = -ENXIO;
u64 val = 0; u64 val = 0;
u64 cnt = ulen; u64 cnt = ulen;
...@@ -68,7 +67,7 @@ static inline int __pcistg_mio_inuser( ...@@ -68,7 +67,7 @@ static inline int __pcistg_mio_inuser(
" aghi %[src],1\n" " aghi %[src],1\n"
" ogr %[val],%[tmp]\n" " ogr %[val],%[tmp]\n"
" brctg %[cnt],0b\n" " brctg %[cnt],0b\n"
"1: .insn rre,0xb9d40000,%[val],%[ioaddr]\n" "1: .insn rre,0xb9d40000,%[val],%[ioaddr_len]\n"
"2: ipm %[cc]\n" "2: ipm %[cc]\n"
" srl %[cc],28\n" " srl %[cc],28\n"
"3: sacf 768\n" "3: sacf 768\n"
...@@ -76,10 +75,9 @@ static inline int __pcistg_mio_inuser( ...@@ -76,10 +75,9 @@ static inline int __pcistg_mio_inuser(
: :
[src] "+a" (src), [cnt] "+d" (cnt), [src] "+a" (src), [cnt] "+d" (cnt),
[val] "+d" (val), [tmp] "=d" (tmp), [val] "+d" (val), [tmp] "=d" (tmp),
[len] "+d" (len), [cc] "+d" (cc), [cc] "+d" (cc), [ioaddr_len] "+&d" (ioaddr_len.pair)
[ioaddr] "+a" (addr)
:: "cc", "memory"); :: "cc", "memory");
*status = len >> 24 & 0xff; *status = ioaddr_len.odd >> 24 & 0xff;
/* did we read everything from user memory? */ /* did we read everything from user memory? */
if (!cc && cnt != 0) if (!cc && cnt != 0)
...@@ -195,8 +193,7 @@ static inline int __pcilg_mio_inuser( ...@@ -195,8 +193,7 @@ static inline int __pcilg_mio_inuser(
void __user *dst, const void __iomem *ioaddr, void __user *dst, const void __iomem *ioaddr,
u64 ulen, u8 *status) u64 ulen, u8 *status)
{ {
register u64 addr asm("2") = (u64 __force) ioaddr; union register_pair ioaddr_len = {.even = (u64 __force)ioaddr, .odd = ulen};
register u64 len asm("3") = ulen;
u64 cnt = ulen; u64 cnt = ulen;
int shift = ulen * 8; int shift = ulen * 8;
int cc = -ENXIO; int cc = -ENXIO;
...@@ -209,7 +206,7 @@ static inline int __pcilg_mio_inuser( ...@@ -209,7 +206,7 @@ static inline int __pcilg_mio_inuser(
*/ */
asm volatile ( asm volatile (
" sacf 256\n" " sacf 256\n"
"0: .insn rre,0xb9d60000,%[val],%[ioaddr]\n" "0: .insn rre,0xb9d60000,%[val],%[ioaddr_len]\n"
"1: ipm %[cc]\n" "1: ipm %[cc]\n"
" srl %[cc],28\n" " srl %[cc],28\n"
" ltr %[cc],%[cc]\n" " ltr %[cc],%[cc]\n"
...@@ -222,18 +219,17 @@ static inline int __pcilg_mio_inuser( ...@@ -222,18 +219,17 @@ static inline int __pcilg_mio_inuser(
"4: sacf 768\n" "4: sacf 768\n"
EX_TABLE(0b, 4b) EX_TABLE(1b, 4b) EX_TABLE(3b, 4b) EX_TABLE(0b, 4b) EX_TABLE(1b, 4b) EX_TABLE(3b, 4b)
: :
[cc] "+d" (cc), [val] "=d" (val), [len] "+d" (len), [ioaddr_len] "+&d" (ioaddr_len.pair),
[cc] "+d" (cc), [val] "=d" (val),
[dst] "+a" (dst), [cnt] "+d" (cnt), [tmp] "=d" (tmp), [dst] "+a" (dst), [cnt] "+d" (cnt), [tmp] "=d" (tmp),
[shift] "+d" (shift) [shift] "+d" (shift)
: :: "cc", "memory");
[ioaddr] "a" (addr)
: "cc", "memory");
/* did we write everything to the user space buffer? */ /* did we write everything to the user space buffer? */
if (!cc && cnt != 0) if (!cc && cnt != 0)
cc = -EFAULT; cc = -EFAULT;
*status = len >> 24 & 0xff; *status = ioaddr_len.odd >> 24 & 0xff;
return cc; return cc;
} }
......
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