提交 d40dc9eb 编写于 作者: A Alexander Varnin 提交者: Kukjin Kim

ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443

Actually, SPI channel 0 on 2443 is mapped to HS SPI controller,
and to enable s3c2410-spi controller, we should power on channel
1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its
clock.
Signed-off-by: NAlexander Varnin <fenixk19@mail.ru>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
上级 868b2f23
......@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = {
.devname = "s3c2410-spi.0",
.parent = &clk_p,
.enable = s3c2443_clkcon_enable_p,
.ctrlbit = S3C2443_PCLKCON_SPI0,
}, {
.name = "spi",
.devname = "s3c2410-spi.1",
.parent = &clk_p,
.enable = s3c2443_clkcon_enable_p,
.ctrlbit = S3C2443_PCLKCON_SPI1,
}
};
......
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