提交 d3f332b5 编写于 作者: P Pali Rohár 提交者: Lorenzo Pieralisi

PCI: pci-bridge-emul: Rename PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR to...

PCI: pci-bridge-emul: Rename PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR to PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD

This flag describe whether PCI bridge supports forwarding of prefetchable
memory requests in given range between primary and secondary buses. It does
not specify if bridge has support for prefetchable memory BAR (moreover
this pci-bridge-emul.c driver does not provide support for BARs).

So change name of this flag to be less misleading and add comment.

Link: https://lore.kernel.org/r/20220104153529.31647-4-pali@kernel.orgSigned-off-by: NPali Rohár <pali@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: NRob Herring <robh@kernel.org>
上级 64a70f52
......@@ -747,7 +747,7 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port)
bridge->data = port;
bridge->ops = &mvebu_pci_bridge_emul_ops;
return pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR);
return pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD);
}
static inline struct mvebu_pcie *sys_to_pcie(struct pci_sys_data *sys)
......
......@@ -377,7 +377,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
~(BIT(10) << 16);
}
if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) {
if (flags & PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD) {
bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].ro = ~0;
bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0;
}
......
......@@ -120,7 +120,11 @@ struct pci_bridge_emul {
};
enum {
PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR = BIT(0),
/*
* PCI bridge does not support forwarding of prefetchable memory
* requests between primary and secondary buses.
*/
PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD = BIT(0),
};
int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
......
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