未验证 提交 ccb1fa21 编写于 作者: J Jiaxin Yu 提交者: Mark Brown

ASoC: mediatek: mt6358: add delay after dmic clock on

Most dmics produce a high level when they receive clock. The difference
between power-on and memory record time is about 10ms, but the dmic
needs 50ms to output normal data.

This commit add 100ms delay after SoC output clock so that we can cut
off the pop noise at the beginning.
Signed-off-by: NJiaxin Yu <jiaxin.yu@mediatek.com>
Link: https://lore.kernel.org/r/1564980997-11359-1-git-send-email-jiaxin.yu@mediatek.comSigned-off-by: NMark Brown <broonie@kernel.org>
上级 d59170b4
......@@ -1730,6 +1730,10 @@ static int mt6358_dmic_enable(struct mt6358_priv *priv)
/* UL turn on */
regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0003);
/* Prevent pop noise form dmic hw */
msleep(100);
return 0;
}
......
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