diff --git a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c index c7aed5ed5fa570df3aad9dc4a43ffd9097eb6bac..0fcf094ae594bb62e872219379e02810120e0b3d 100644 --- a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c +++ b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c @@ -132,7 +132,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( /* RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */ dm_odm->RFCalibrateInfo.RegA24 = 0x090e1317; - ThermalValue = (u8)rtl8188e_PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ + ThermalValue = (u8)rtl8188e_PHY_QueryRFReg(Adapter, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ if (ThermalValue) { /* Query OFDM path A default setting */ @@ -759,7 +759,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt) if ((tmpreg & 0x70) != 0) { /* 1. Read original RF mode */ /* Path-A */ - RF_Amode = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits); + RF_Amode = rtl8188e_PHY_QueryRFReg(adapt, RF_AC, bMask12Bits); /* 2. Set RF mode = standby mode */ /* Path-A */ @@ -767,7 +767,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt) } /* 3. Read RF reg18 */ - LC_Cal = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits); + LC_Cal = rtl8188e_PHY_QueryRFReg(adapt, RF_CHNLBW, bMask12Bits); /* 4. Set LC calibration begin bit15 */ rtl8188e_PHY_SetRFReg(adapt, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000); diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c index 9e02855c47b2823ad1017d7df7449b1cf965aae7..2dcd1df58aaa5d97b3b25868992cc5e945ab1b4e 100644 --- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c +++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c @@ -253,7 +253,6 @@ phy_RFSerialWrite( * * Input: * struct adapter *Adapter, -* enum rf_radio_path eRFPath, Radio path of A/B/C/D * u32 RegAddr, The target address to be read * u32 BitMask The target bit position in the target address * to be read @@ -262,12 +261,11 @@ phy_RFSerialWrite( * Return: u32 Readback value * Note: This function is equal to "GetRFRegSetting" in PHY programming guide */ -u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath, - u32 RegAddr, u32 BitMask) +u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask) { u32 Original_Value, Readback_Value, BitShift; - Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); + Original_Value = phy_RFSerialRead(Adapter, RF_PATH_A, RegAddr); BitShift = phy_CalculateBitShift(BitMask); Readback_Value = (Original_Value & BitMask) >> BitShift; diff --git a/drivers/staging/r8188eu/hal/usb_halinit.c b/drivers/staging/r8188eu/hal/usb_halinit.c index a2a8166ac3f983aacefed8e9635484151a7a5651..e2013745d41c3d3ca1361c69fc87fe56e4a3a380 100644 --- a/drivers/staging/r8188eu/hal/usb_halinit.c +++ b/drivers/staging/r8188eu/hal/usb_halinit.c @@ -662,7 +662,7 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ /* Keep RfRegChnlVal for later use. */ - haldata->RfRegChnlVal = rtl8188e_PHY_QueryRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + haldata->RfRegChnlVal = rtl8188e_PHY_QueryRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask); _BBTurnOnBlock(Adapter); diff --git a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h index e0dff772534d1edd7e0802cfdeab80a0c56c1975..9e6f2361b09051d5589a49c38bcfc744f654f259 100644 --- a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h +++ b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h @@ -73,8 +73,7 @@ struct bb_reg_def { u32 rtl8188e_PHY_QueryBBReg(struct adapter *adapter, u32 regaddr, u32 mask); void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 mask, u32 data); -u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, enum rf_radio_path rfpath, - u32 regaddr, u32 mask); +u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, u32 regaddr, u32 mask); void rtl8188e_PHY_SetRFReg(struct adapter *adapter, u32 regaddr, u32 mask, u32 data); /* Initialization related function */ diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c index 4b3134aef9172bb699260eb079e1675f89f56c03..f6a683cda614450bcb8df2aaec8032b6fbbd6047 100644 --- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c +++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c @@ -2067,7 +2067,7 @@ static int rtw_wx_read_rf(struct net_device *dev, return -EINVAL; addr = *((u32 *)extra + 1); - data32 = rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, addr, 0xFFFFF); + data32 = rtl8188e_PHY_QueryRFReg(padapter, addr, 0xFFFFF); /* * IMPORTANT!! * Only when wireless private ioctl is at odd order, @@ -3547,7 +3547,7 @@ static void rf_reg_dump(struct adapter *padapter) pr_info("\n ======= RF REG =======\n"); pr_info("\nRF_Path(%x)\n", RF_PATH_A); for (i = 0; i < 0x100; i++) { - value = rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, i, 0xffffffff); + value = rtl8188e_PHY_QueryRFReg(padapter, i, 0xffffffff); if (j % 4 == 1) pr_info("0x%02x ", i); pr_info(" 0x%08x ", value); @@ -3625,7 +3625,7 @@ static int rtw_dbg_port(struct net_device *dev, ret = -EINVAL; break; } - DBG_88E("read RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, arg, 0xffffffff)); + DBG_88E("read RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, arg, 0xffffffff)); break; case 0x75:/* write_rf */ if (minor_cmd != RF_PATH_A) { @@ -3633,7 +3633,7 @@ static int rtw_dbg_port(struct net_device *dev, break; } rtl8188e_PHY_SetRFReg(padapter, arg, 0xffffffff, extra_arg); - DBG_88E("write RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, RF_PATH_A, arg, 0xffffffff)); + DBG_88E("write RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", RF_PATH_A, arg, rtl8188e_PHY_QueryRFReg(padapter, arg, 0xffffffff)); break; case 0x76: