Intel:PCI/portdrv: Support PCIe services on subtractive decode bridges

mainline inclusion
from mainline-v5.1-rc1
commit f0cfecea
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I47H3V
CVE: NA

--------------------------------

commit f0cfecea upstream.
Backport summary: for 4.19 kernel ICX PCIe Gen4 support.

The Class Code for subtractive decode PCI-to-PCI bridge is 060401h; add an
entry to make portdrv support this type of bridge.  This allows use of PCIe
services on subtractive decode ports.
Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com>
[bhelgaas: add braces surrounding entry]
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
(cherry picked from commit f0cfecea)
Signed-off-by: NEthan Zhao <haifeng.zhao@intel.com>
Signed-off-by: NJackie Liu <liuyun01@kylinos.cn>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
Reviewed-by: NXiongfeng Wang <wangxiongfeng2@huawei.com>
Reviewed-by: NXie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

drivers/pci/pcie/portdrv_pci.c

@@ -187,6 +187,8 @@ static void pcie_portdrv_err_resume(struct pci_dev *dev)
 static const struct pci_device_id port_pci_ids[] = {
 	/* handle any PCI-Express port */
 	{ PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) },
+	/* subtractive decode PCI-to-PCI bridge, class type is 060401h */
+	{ PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) },
 	{ },
 };