From a961d659637b7d77c916597017e2e3730859c333 Mon Sep 17 00:00:00 2001
From: Jie Zhang <jie.zhang@analog.com>
Date: Sun, 18 Nov 2007 00:00:10 +0800
Subject: [PATCH] Blackfin arch: More explicitly describe what the instructions
 do in inline assembly.

Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
---
 include/asm-blackfin/mach-common/def_LPBlackfin.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/asm-blackfin/mach-common/def_LPBlackfin.h b/include/asm-blackfin/mach-common/def_LPBlackfin.h
index c1d8c4a78fcf..e8967f6124f7 100644
--- a/include/asm-blackfin/mach-common/def_LPBlackfin.h
+++ b/include/asm-blackfin/mach-common/def_LPBlackfin.h
@@ -46,7 +46,7 @@
 #endif
 
 #define bfin_read8(addr) ({ \
-	uint8_t __v; \
+	uint32_t __v; \
 	__asm__ __volatile__( \
 		NOP_PAD_ANOMALY_05000198 \
 		"%0 = b[%1] (z);" \
@@ -56,7 +56,7 @@
 	__v; })
 
 #define bfin_read16(addr) ({ \
-	uint16_t __v; \
+	uint32_t __v; \
 	__asm__ __volatile__( \
 		NOP_PAD_ANOMALY_05000198 \
 		"%0 = w[%1] (z);" \
@@ -80,7 +80,7 @@
 		NOP_PAD_ANOMALY_05000198 \
 		"b[%0] = %1;" \
 		: \
-		: "a" (addr), "d" (val) \
+		: "a" (addr), "d" ((uint8_t)(val)) \
 		: "memory" \
 	)
 
@@ -89,7 +89,7 @@
 		NOP_PAD_ANOMALY_05000198 \
 		"w[%0] = %1;" \
 		: \
-		: "a" (addr), "d" (val) \
+		: "a" (addr), "d" ((uint16_t)(val)) \
 		: "memory" \
 	)
 
-- 
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