提交 9916d57e 编写于 作者: A Alexander Graf

KVM: PPC: Book3S PR: Expose TM registers

POWER8 introduces transactional memory which brings along a number of new
registers and MSR bits.

Implementing all of those is a pretty big headache, so for now let's at least
emulate enough to make Linux's context switching code happy.
Signed-off-by: NAlexander Graf <agraf@suse.de>
上级 2e23f544
...@@ -451,6 +451,17 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) ...@@ -451,6 +451,17 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
case SPRN_EBBRR: case SPRN_EBBRR:
vcpu->arch.ebbrr = spr_val; vcpu->arch.ebbrr = spr_val;
break; break;
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
case SPRN_TFHAR:
vcpu->arch.tfhar = spr_val;
break;
case SPRN_TEXASR:
vcpu->arch.texasr = spr_val;
break;
case SPRN_TFIAR:
vcpu->arch.tfiar = spr_val;
break;
#endif
#endif #endif
case SPRN_ICTC: case SPRN_ICTC:
case SPRN_THRM1: case SPRN_THRM1:
...@@ -572,6 +583,17 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val ...@@ -572,6 +583,17 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
case SPRN_EBBRR: case SPRN_EBBRR:
*spr_val = vcpu->arch.ebbrr; *spr_val = vcpu->arch.ebbrr;
break; break;
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
case SPRN_TFHAR:
*spr_val = vcpu->arch.tfhar;
break;
case SPRN_TEXASR:
*spr_val = vcpu->arch.texasr;
break;
case SPRN_TFIAR:
*spr_val = vcpu->arch.tfiar;
break;
#endif
#endif #endif
case SPRN_THRM1: case SPRN_THRM1:
case SPRN_THRM2: case SPRN_THRM2:
......
...@@ -794,9 +794,27 @@ static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac) ...@@ -794,9 +794,27 @@ static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
/* Enable facilities (TAR, EBB, DSCR) for the guest */ /* Enable facilities (TAR, EBB, DSCR) for the guest */
static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac) static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
{ {
bool guest_fac_enabled;
BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S)); BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));
if (!(vcpu->arch.fscr & (1ULL << fac))) { /*
* Not every facility is enabled by FSCR bits, check whether the
* guest has this facility enabled at all.
*/
switch (fac) {
case FSCR_TAR_LG:
case FSCR_EBB_LG:
guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
break;
case FSCR_TM_LG:
guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
break;
default:
guest_fac_enabled = false;
break;
}
if (!guest_fac_enabled) {
/* Facility not enabled by the guest */ /* Facility not enabled by the guest */
kvmppc_trigger_fac_interrupt(vcpu, fac); kvmppc_trigger_fac_interrupt(vcpu, fac);
return RESUME_GUEST; return RESUME_GUEST;
......
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