diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index 2b5c823995f92601a5f9de73c02473e2dafdd84d..60716b35444b4535bb243d206dc5be88dacd8f68 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -361,6 +361,8 @@ bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev)
 	union umc_info *umc_info;
 	u8 frev, crev;
 	bool ecc_default_enabled = false;
+	u8 umc_config;
+	u32 umc_config1;
 
 	index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
 			umc_info);
@@ -372,19 +374,21 @@ bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev)
 				(mode_info->atom_context->bios + data_offset);
 			switch (crev) {
 			case 1:
+				umc_config = le32_to_cpu(umc_info->v31.umc_config);
 				ecc_default_enabled =
-					(le32_to_cpu(umc_info->v31.umc_config) &
-					 UMC_CONFIG__DEFAULT_MEM_ECC_ENABLE) ? true : false;
+					(umc_config & UMC_CONFIG__DEFAULT_MEM_ECC_ENABLE) ? true : false;
 				break;
 			case 2:
+				umc_config = le32_to_cpu(umc_info->v32.umc_config);
 				ecc_default_enabled =
-					(le32_to_cpu(umc_info->v32.umc_config) &
-					 UMC_CONFIG__DEFAULT_MEM_ECC_ENABLE) ? true : false;
+					(umc_config & UMC_CONFIG__DEFAULT_MEM_ECC_ENABLE) ? true : false;
 				break;
 			case 3:
+				umc_config = le32_to_cpu(umc_info->v33.umc_config);
+				umc_config1 = le32_to_cpu(umc_info->v33.umc_config1);
 				ecc_default_enabled =
-					(le32_to_cpu(umc_info->v33.umc_config1) &
-					 UMC_CONFIG1__ENABLE_ECC_CAPABLE) ? true : false;
+					((umc_config & UMC_CONFIG__DEFAULT_MEM_ECC_ENABLE) ||
+					 (umc_config1 & UMC_CONFIG1__ENABLE_ECC_CAPABLE)) ? true : false;
 				break;
 			default:
 				/* unsupported crev */