[PATCH] ARM: 2753/1: move ixdp* cpld mappings

Patch from Lennert Buytenhek

All ixdp platforms currently have a cpld mapped in at 0xfafff000.
Since this address is not 1M-aligned, a regular page mapping will be
used instead of a section mapping, which opens up the possibility of
triggering ixp2400 erratum #66 as we only do the XCB=101 workaround
thing for section mappings.
There is still a lot of space higher up in the virtual memory map
for 1M mappings, so move the cpld mapping to 0xfe000000 and make it
1M big so that a section mapping will be used for it.
Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

include/asm-arm/arch-ixp2000/ixdp2x00.h

@@ -21,8 +21,8 @@
  * On board CPLD memory map
  */
 #define IXDP2X00_PHYS_CPLD_BASE		0xc7000000
-#define IXDP2X00_VIRT_CPLD_BASE		0xfafff000
-#define IXDP2X00_CPLD_SIZE		0x00001000
+#define IXDP2X00_VIRT_CPLD_BASE		0xfe000000
+#define IXDP2X00_CPLD_SIZE		0x00100000
 
 
 #define IXDP2X00_CPLD_REG(x)  	\

include/asm-arm/arch-ixp2000/ixdp2x01.h

@@ -18,8 +18,8 @@
 #define __IXDP2X01_H__
 
 #define	IXDP2X01_PHYS_CPLD_BASE		0xc6024000
-#define	IXDP2X01_VIRT_CPLD_BASE		0xfafff000
-#define	IXDP2X01_CPLD_REGION_SIZE	0x00001000
+#define	IXDP2X01_VIRT_CPLD_BASE		0xfe000000
+#define	IXDP2X01_CPLD_REGION_SIZE	0x00100000
 
 #define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg)
 #define IXDP2X01_CPLD_PHYS_REG(reg) (volatile u32*)(IXDP2X01_PHYS_CPLD_BASE | reg)