提交 907c51b2 编写于 作者: R Ralf Baechle

[MIPS] Ocelot C: Fix MAC address detection after platform_device conversion.

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
上级 d6b861c6
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
# Makefile for Momentum Computer's Ocelot-C and -CS boards. # Makefile for Momentum Computer's Ocelot-C and -CS boards.
# #
obj-y += cpci-irq.o irq.o prom.o reset.o \ obj-y += cpci-irq.o irq.o platform.o prom.o reset.o \
setup.o uart-irq.o setup.o uart-irq.o
obj-$(CONFIG_KGDB) += dbg_io.o obj-$(CONFIG_KGDB) += dbg_io.o
#include <linux/delay.h>
#include <linux/if_ether.h>
#include <linux/ioport.h>
#include <linux/mv643xx.h>
#include <linux/platform_device.h>
#include "ocelot_c_fpga.h"
#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
static struct resource mv643xx_eth_shared_resources[] = {
[0] = {
.name = "ethernet shared base",
.start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
.end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
MV643XX_ETH_SHARED_REGS_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device mv643xx_eth_shared_device = {
.name = MV643XX_ETH_SHARED_NAME,
.id = 0,
.num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
.resource = mv643xx_eth_shared_resources,
};
#define MV_SRAM_BASE 0xfe000000UL
#define MV_SRAM_SIZE (256 * 1024)
#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
#define MV64x60_IRQ_ETH_0 48
#define MV64x60_IRQ_ETH_1 49
#ifdef CONFIG_MV643XX_ETH_0
static struct resource mv64x60_eth0_resources[] = {
[0] = {
.name = "eth0 irq",
.start = MV64x60_IRQ_ETH_0,
.end = MV64x60_IRQ_ETH_0,
.flags = IORESOURCE_IRQ,
},
};
static char eth0_mac_addr[ETH_ALEN];
static struct mv643xx_eth_platform_data eth0_pd = {
.mac_addr = eth0_mac_addr,
.tx_sram_addr = MV_SRAM_BASE_ETH0,
.tx_sram_size = MV_SRAM_TXRING_SIZE,
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
.rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
.rx_sram_size = MV_SRAM_RXRING_SIZE,
.rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
};
static struct platform_device eth0_device = {
.name = MV643XX_ETH_NAME,
.id = 0,
.num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
.resource = mv64x60_eth0_resources,
.dev = {
.platform_data = &eth0_pd,
},
};
#endif /* CONFIG_MV643XX_ETH_0 */
#ifdef CONFIG_MV643XX_ETH_1
static struct resource mv64x60_eth1_resources[] = {
[0] = {
.name = "eth1 irq",
.start = MV64x60_IRQ_ETH_1,
.end = MV64x60_IRQ_ETH_1,
.flags = IORESOURCE_IRQ,
},
};
static char eth1_mac_addr[ETH_ALEN];
static struct mv643xx_eth_platform_data eth1_pd = {
.mac_addr = eth1_mac_addr,
.tx_sram_addr = MV_SRAM_BASE_ETH1,
.tx_sram_size = MV_SRAM_TXRING_SIZE,
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
.rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
.rx_sram_size = MV_SRAM_RXRING_SIZE,
.rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
};
static struct platform_device eth1_device = {
.name = MV643XX_ETH_NAME,
.id = 1,
.num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
.resource = mv64x60_eth1_resources,
.dev = {
.platform_data = &eth1_pd,
},
};
#endif /* CONFIG_MV643XX_ETH_1 */
static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
&mv643xx_eth_shared_device,
#ifdef CONFIG_MV643XX_ETH_0
&eth0_device,
#endif
#ifdef CONFIG_MV643XX_ETH_1
&eth1_device,
#endif
/* The third port is not wired up on the Ocelot C */
};
static u8 __init exchange_bit(u8 val, u8 cs)
{
/* place the data */
OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
udelay(1);
/* turn the clock on */
OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
udelay(1);
/* turn the clock off and read-strobe */
OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
/* return the data */
return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
}
static void __init get_mac(char dest[6])
{
u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
int i,j;
for (i = 0; i < 12; i++)
exchange_bit(read_opcode[i], 1);
for (j = 0; j < 6; j++) {
dest[j] = 0;
for (i = 0; i < 8; i++) {
dest[j] <<= 1;
dest[j] |= exchange_bit(0, 1);
}
}
/* turn off CS */
exchange_bit(0,0);
}
/*
* Copy and increment ethernet MAC address by a small value.
*
* This is useful for systems where the only one MAC address is stored in
* non-volatile memory for multiple ports.
*/
static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
unsigned int add)
{
int i;
BUG_ON(add >= 256);
for (i = ETH_ALEN; i >= 0; i--) {
dst[i] = src[i] + add;
add = dst[i] < src[i]; /* compute carry */
}
WARN_ON(add);
}
static int __init mv643xx_eth_add_pds(void)
{
unsigned char mac[ETH_ALEN];
int ret;
get_mac(mac);
#ifdef CONFIG_MV643XX_ETH_0
eth_mac_add(eth1_mac_addr, mac, 0);
#endif
#ifdef CONFIG_MV643XX_ETH_1
eth_mac_add(eth1_mac_addr, mac, 1);
#endif
ret = platform_add_devices(mv643xx_eth_pd_devs,
ARRAY_SIZE(mv643xx_eth_pd_devs));
return ret;
}
device_initcall(mv643xx_eth_add_pds);
#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
...@@ -31,10 +31,6 @@ struct callvectors* debug_vectors; ...@@ -31,10 +31,6 @@ struct callvectors* debug_vectors;
extern unsigned long marvell_base; extern unsigned long marvell_base;
extern unsigned int cpu_clock; extern unsigned int cpu_clock;
#ifdef CONFIG_MV643XX_ETH
extern unsigned char prom_mac_addr_base[6];
#endif
const char *get_system_type(void) const char *get_system_type(void)
{ {
#ifdef CONFIG_CPU_SR71000 #ifdef CONFIG_CPU_SR71000
...@@ -44,55 +40,6 @@ const char *get_system_type(void) ...@@ -44,55 +40,6 @@ const char *get_system_type(void)
#endif #endif
} }
#ifdef CONFIG_MV643XX_ETH
static void burn_clocks(void)
{
int i;
/* this loop should burn at least 1us -- this should be plenty */
for (i = 0; i < 0x10000; i++)
;
}
static u8 exchange_bit(u8 val, u8 cs)
{
/* place the data */
OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
burn_clocks();
/* turn the clock on */
OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
burn_clocks();
/* turn the clock off and read-strobe */
OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
/* return the data */
return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
}
void get_mac(char dest[6])
{
u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
int i,j;
for (i = 0; i < 12; i++)
exchange_bit(read_opcode[i], 1);
for (j = 0; j < 6; j++) {
dest[j] = 0;
for (i = 0; i < 8; i++) {
dest[j] <<= 1;
dest[j] |= exchange_bit(0, 1);
}
}
/* turn off CS */
exchange_bit(0,0);
}
#endif
#ifdef CONFIG_64BIT #ifdef CONFIG_64BIT
unsigned long signext(unsigned long addr) unsigned long signext(unsigned long addr)
...@@ -226,11 +173,6 @@ void __init prom_init(void) ...@@ -226,11 +173,6 @@ void __init prom_init(void)
mips_machgroup = MACH_GROUP_MOMENCO; mips_machgroup = MACH_GROUP_MOMENCO;
mips_machtype = MACH_MOMENCO_OCELOT_C; mips_machtype = MACH_MOMENCO_OCELOT_C;
#ifdef CONFIG_MV643XX_ETH
/* get the base MAC address for on-board ethernet ports */
get_mac(prom_mac_addr_base);
#endif
#ifndef CONFIG_64BIT #ifndef CONFIG_64BIT
debug_vectors->printf("Booting Linux kernel...\n"); debug_vectors->printf("Booting Linux kernel...\n");
#endif #endif
......
...@@ -50,7 +50,6 @@ ...@@ -50,7 +50,6 @@
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/pm.h> #include <linux/pm.h>
#include <linux/timex.h> #include <linux/timex.h>
#include <linux/vmalloc.h> #include <linux/vmalloc.h>
...@@ -361,123 +360,3 @@ static int io_base_ioremap(void) ...@@ -361,123 +360,3 @@ static int io_base_ioremap(void)
} }
module_init(io_base_ioremap); module_init(io_base_ioremap);
#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
static struct resource mv643xx_eth_shared_resources[] = {
[0] = {
.name = "ethernet shared base",
.start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
.end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
MV643XX_ETH_SHARED_REGS_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device mv643xx_eth_shared_device = {
.name = MV643XX_ETH_SHARED_NAME,
.id = 0,
.num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
.resource = mv643xx_eth_shared_resources,
};
#define MV_SRAM_BASE 0xfe000000UL
#define MV_SRAM_SIZE (256 * 1024)
#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
#define MV64x60_IRQ_ETH_0 48
#define MV64x60_IRQ_ETH_1 49
#ifdef CONFIG_MV643XX_ETH_0
static struct resource mv64x60_eth0_resources[] = {
[0] = {
.name = "eth0 irq",
.start = MV64x60_IRQ_ETH_0,
.end = MV64x60_IRQ_ETH_0,
.flags = IORESOURCE_IRQ,
},
};
static struct mv643xx_eth_platform_data eth0_pd = {
.tx_sram_addr = MV_SRAM_BASE_ETH0,
.tx_sram_size = MV_SRAM_TXRING_SIZE,
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
.rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
.rx_sram_size = MV_SRAM_RXRING_SIZE,
.rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
};
static struct platform_device eth0_device = {
.name = MV643XX_ETH_NAME,
.id = 0,
.num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
.resource = mv64x60_eth0_resources,
.dev = {
.platform_data = &eth0_pd,
},
};
#endif /* CONFIG_MV643XX_ETH_0 */
#ifdef CONFIG_MV643XX_ETH_1
static struct resource mv64x60_eth1_resources[] = {
[0] = {
.name = "eth1 irq",
.start = MV64x60_IRQ_ETH_1,
.end = MV64x60_IRQ_ETH_1,
.flags = IORESOURCE_IRQ,
},
};
static struct mv643xx_eth_platform_data eth1_pd = {
.tx_sram_addr = MV_SRAM_BASE_ETH1,
.tx_sram_size = MV_SRAM_TXRING_SIZE,
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
.rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
.rx_sram_size = MV_SRAM_RXRING_SIZE,
.rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
};
static struct platform_device eth1_device = {
.name = MV643XX_ETH_NAME,
.id = 1,
.num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
.resource = mv64x60_eth1_resources,
.dev = {
.platform_data = &eth1_pd,
},
};
#endif /* CONFIG_MV643XX_ETH_1 */
static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
&mv643xx_eth_shared_device,
#ifdef CONFIG_MV643XX_ETH_0
&eth0_device,
#endif
#ifdef CONFIG_MV643XX_ETH_1
&eth1_device,
#endif
/* The third port is not wired up on the Ocelot C */
};
int mv643xx_eth_add_pds(void)
{
int ret;
ret = platform_add_devices(mv643xx_eth_pd_devs,
ARRAY_SIZE(mv643xx_eth_pd_devs));
return ret;
}
device_initcall(mv643xx_eth_add_pds);
#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
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