diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index c60f5306970847404b539cf3eb32e41d1ddc6448..7d750369b78b5e83f6363d2745d3c3632311be18 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -2750,11 +2750,9 @@ bool dc_validate_stream(struct dc *dc, struct dc_stream_state *stream) bool dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state) { - struct dc *core_dc = dc; - /* TODO For now validates pixel format only */ - if (core_dc->res_pool->funcs->validate_plane) - return core_dc->res_pool->funcs->validate_plane(plane_state) == DC_OK; + if (dc->res_pool->funcs->validate_plane) + return dc->res_pool->funcs->validate_plane(plane_state, &dc->caps) == DC_OK; return true; } diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 4c47a489c87a0e6655b1179e6dca1ae0be929b6e..5a378cc5daafc8c74a6efd8ac1c0c48d72a8a979 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -57,6 +57,7 @@ struct dc_caps { uint32_t max_downscale_ratio; uint32_t i2c_speed_in_khz; unsigned int max_cursor_size; + unsigned int max_video_width; bool dcc_const_color; bool dynamic_audio; }; diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c index b1cf591b34083d9807e534f1fd71484754aa19a7..90911258bdb3ac92a490846199dfd85ba701ca1a 100644 --- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c @@ -743,7 +743,7 @@ static void dce100_destroy_resource_pool(struct resource_pool **pool) *pool = NULL; } -enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state) +enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps) { if (plane_state->format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h index f52cae24ee23349ea676d9531130f57f6705fea8..de8fdf438f9b34125d7179aa6af941f68f18453a 100644 --- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h +++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h @@ -16,7 +16,7 @@ struct resource_pool *dce100_create_resource_pool( uint8_t num_virtual_links, struct dc *dc); -enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state); +enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps); enum dc_status dce100_add_stream_to_ctx( struct dc *dc, diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c index 4dd7c3af51e6c8e207d6c1af41f7e5eb53a50818..2caad73257e0ba61b77c8376fef29f8aa92f2aef 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c @@ -1163,10 +1163,11 @@ static void dcn10_destroy_resource_pool(struct resource_pool **pool) *pool = NULL; } -enum dc_status dcn10_validate_plane(const struct dc_plane_state *plane_state) +static enum dc_status dcn10_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps) { if (plane_state->format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN - && plane_state->src_rect.width > 3840) + && caps->max_video_width != 0 + && plane_state->src_rect.width > caps->max_video_width) return DC_FAIL_SURFACE_VALIDATE; return DC_OK; @@ -1222,6 +1223,7 @@ static bool construct( /* max pipe num for ASIC before check pipe fuses */ pool->base.pipe_count = pool->base.res_cap->num_timing_generator; + dc->caps.max_video_width = 3840; dc->caps.max_downscale_ratio = 200; dc->caps.i2c_speed_in_khz = 100; dc->caps.max_cursor_size = 256; diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h index 5230dddc86171c79ebe5872acabbaa21639e8c2c..118122d12e2b204eaae858e530e66dd5e0ed6f95 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h @@ -111,7 +111,7 @@ struct resource_funcs { const struct resource_pool *pool, struct dc_stream_state *stream); - enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state); + enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state, struct dc_caps *caps); enum dc_status (*add_stream_to_ctx)( struct dc *dc,