提交 8dfe875a 编写于 作者: S Sriram R 提交者: Kalle Valo

wifi: ath11k: update hw params for IPQ5018

Add new compatible string for IPQ5018 and add
required hw params for IPQ5018. The hw descriptors size and
datapath ops are similar to QCN9074, hence reuse the same.

Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
Signed-off-by: NSriram R <quic_srirrama@quicinc.com>
Co-developed-by: NKarthikeyan Kathirvel <quic_kathirve@quicinc.com>
Signed-off-by: NKarthikeyan Kathirvel <quic_kathirve@quicinc.com>
Signed-off-by: NKalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20221122132152.17771-3-quic_kathirve@quicinc.com
上级 679d708a
...@@ -604,6 +604,77 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -604,6 +604,77 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.smp2p_wow_exit = true, .smp2p_wow_exit = true,
.support_fw_mac_sequence = true, .support_fw_mac_sequence = true,
}, },
{
.hw_rev = ATH11K_HW_IPQ5018_HW10,
.name = "ipq5018 hw1.0",
.fw = {
.dir = "IPQ5018/hw1.0",
.board_size = 256 * 1024,
.cal_offset = 128 * 1024,
},
.max_radios = MAX_RADIOS_5018,
.bdf_addr = 0x4BA00000,
/* hal_desc_sz and hw ops are similar to qcn9074 */
.hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
.qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
.ring_mask = &ath11k_hw_ring_mask_ipq8074,
.credit_flow = false,
.max_tx_ring = 1,
.spectral = {
.fft_sz = 2,
.fft_pad_sz = 0,
.summary_pad_sz = 16,
.fft_hdr_len = 24,
.max_fft_bins = 1024,
},
.internal_sleep_clock = false,
.host_ce_config = ath11k_host_ce_config_qcn9074,
.ce_count = CE_CNT_5018,
.rxdma1_enable = true,
.num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
.rx_mac_buf_ring = false,
.vdev_start_delay = false,
.htt_peer_map_v2 = true,
.interface_modes = BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_AP) |
BIT(NL80211_IFTYPE_MESH_POINT),
.supports_monitor = false,
.supports_sta_ps = false,
.supports_shadow_regs = false,
.fw_mem_mode = 0,
.num_vdevs = 16 + 1,
.num_peers = 512,
.supports_regdb = false,
.idle_ps = false,
.supports_suspend = false,
.hal_params = &ath11k_hw_hal_params_ipq8074,
.single_pdev_only = false,
.cold_boot_calib = true,
.fix_l1ss = true,
.supports_dynamic_smps_6ghz = false,
.alloc_cacheable_memory = true,
.supports_rssi_stats = false,
.fw_wmi_diag_event = false,
.current_cc_support = false,
.dbr_debug_support = true,
.global_reset = false,
.bios_sar_capa = NULL,
.m3_fw_support = false,
.fixed_bdf_addr = true,
.fixed_mem_region = true,
.static_window_map = false,
.hybrid_bus_type = false,
.fixed_fw_mem = false,
.support_off_channel_tx = false,
.supports_multi_bssid = false,
.sram_dump = {},
.tcl_ring_retry = true,
.tx_ring_size = DP_TCL_DATA_RING_SIZE,
.smp2p_wow_exit = false,
.support_fw_mac_sequence = false,
},
}; };
static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab) static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)
......
...@@ -142,6 +142,7 @@ enum ath11k_hw_rev { ...@@ -142,6 +142,7 @@ enum ath11k_hw_rev {
ATH11K_HW_WCN6855_HW20, ATH11K_HW_WCN6855_HW20,
ATH11K_HW_WCN6855_HW21, ATH11K_HW_WCN6855_HW21,
ATH11K_HW_WCN6750_HW10, ATH11K_HW_WCN6750_HW10,
ATH11K_HW_IPQ5018_HW10,
}; };
enum ath11k_firmware_mode { enum ath11k_firmware_mode {
...@@ -230,6 +231,13 @@ struct ath11k_he { ...@@ -230,6 +231,13 @@ struct ath11k_he {
#define MAX_RADIOS 3 #define MAX_RADIOS 3
/* ipq5018 hw param macros */
#define MAX_RADIOS_5018 1
#define CE_CNT_5018 6
#define TARGET_CE_CNT_5018 9
#define SVC_CE_MAP_LEN_5018 17
#define RXDMA_PER_PDEV_5018 1
enum { enum {
WMI_HOST_TP_SCALE_MAX = 0, WMI_HOST_TP_SCALE_MAX = 0,
WMI_HOST_TP_SCALE_50 = 1, WMI_HOST_TP_SCALE_50 = 1,
......
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