提交 85afc317 编写于 作者: B Ben Widawsky 提交者: Dan Williams

cxl/pci: Split cxl_pci_setup_regs()

In preparation for moving parts of register mapping to cxl_core, split
cxl_pci_setup_regs() into a helper that finds register blocks,
(cxl_find_regblock()), and a generic wrapper that probes the precise
register sets within a block (cxl_setup_regs()).

Move the actual mapping (cxl_map_regs()) of the only register-set that
cxl_pci cares about (memory device registers) up a level from the former
cxl_pci_setup_regs() into cxl_pci_probe().

With this change the unused component registers are no longer mapped,
but the helpers are primed to move into the core.

[djbw: drop cxl_map_regs() for component registers]
Signed-off-by: NBen Widawsky <ben.widawsky@intel.com>
[djbw: rebase on the cxl_register_map refactor]
Reviewed-by: NIra Weiny <ira.weiny@intel.com>
Reviewed-by: NJonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/163434053788.914258.18412599112859205220.stgit@dwillia2-desk3.amr.corp.intel.comSigned-off-by: NDan Williams <dan.j.williams@intel.com>
上级 a261e9a1
...@@ -433,72 +433,69 @@ static void cxl_decode_regblock(u32 reg_lo, u32 reg_hi, ...@@ -433,72 +433,69 @@ static void cxl_decode_regblock(u32 reg_lo, u32 reg_hi,
} }
/** /**
* cxl_pci_setup_regs() - Setup necessary MMIO. * cxl_find_regblock() - Locate register blocks by type
* @cxlm: The CXL memory device to communicate with. * @pdev: The CXL PCI device to enumerate.
* @type: Register Block Indicator id
* @map: Enumeration output, clobbered on error
* *
* Return: 0 if all necessary registers mapped. * Return: 0 if register block enumerated, negative error code otherwise
* *
* A memory device is required by spec to implement a certain set of MMIO * A CXL DVSEC may point to one or more register blocks, search for them
* regions. The purpose of this function is to enumerate and map those * by @type.
* registers.
*/ */
static int cxl_pci_setup_regs(struct cxl_mem *cxlm) static int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type,
struct cxl_register_map *map)
{ {
u32 regloc_size, regblocks; u32 regloc_size, regblocks;
int regloc, i, n_maps, ret = 0; int regloc, i;
struct device *dev = cxlm->dev;
struct pci_dev *pdev = to_pci_dev(dev);
struct cxl_register_map *map, maps[CXL_REGLOC_RBI_TYPES];
regloc = cxl_pci_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID); regloc = cxl_pci_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID);
if (!regloc) { if (!regloc)
dev_err(dev, "register location dvsec not found\n");
return -ENXIO; return -ENXIO;
}
/* Get the size of the Register Locator DVSEC */
pci_read_config_dword(pdev, regloc + PCI_DVSEC_HEADER1, &regloc_size); pci_read_config_dword(pdev, regloc + PCI_DVSEC_HEADER1, &regloc_size);
regloc_size = FIELD_GET(PCI_DVSEC_HEADER1_LENGTH_MASK, regloc_size); regloc_size = FIELD_GET(PCI_DVSEC_HEADER1_LENGTH_MASK, regloc_size);
regloc += PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET; regloc += PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET;
regblocks = (regloc_size - PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET) / 8; regblocks = (regloc_size - PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET) / 8;
for (i = 0, n_maps = 0; i < regblocks; i++, regloc += 8) { for (i = 0; i < regblocks; i++, regloc += 8) {
u32 reg_lo, reg_hi; u32 reg_lo, reg_hi;
pci_read_config_dword(pdev, regloc, &reg_lo); pci_read_config_dword(pdev, regloc, &reg_lo);
pci_read_config_dword(pdev, regloc + 4, &reg_hi); pci_read_config_dword(pdev, regloc + 4, &reg_hi);
map = &maps[n_maps];
cxl_decode_regblock(reg_lo, reg_hi, map); cxl_decode_regblock(reg_lo, reg_hi, map);
/* Ignore unknown register block types */ if (map->reg_type == type)
if (map->reg_type > CXL_REGLOC_RBI_MEMDEV) return 0;
continue; }
ret = cxl_map_regblock(pdev, map); return -ENODEV;
if (ret) }
return ret;
ret = cxl_probe_regs(pdev, map); static int cxl_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
cxl_unmap_regblock(pdev, map); struct cxl_register_map *map)
if (ret) {
return ret; int rc;
n_maps++; rc = cxl_find_regblock(pdev, type, map);
} if (rc)
return rc;
for (i = 0; i < n_maps; i++) { rc = cxl_map_regblock(pdev, map);
ret = cxl_map_regs(cxlm, &maps[i]); if (rc)
if (ret) return rc;
break;
}
return ret; rc = cxl_probe_regs(pdev, map);
cxl_unmap_regblock(pdev, map);
return rc;
} }
static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{ {
struct cxl_register_map map;
struct cxl_memdev *cxlmd; struct cxl_memdev *cxlmd;
struct cxl_mem *cxlm; struct cxl_mem *cxlm;
int rc; int rc;
...@@ -518,7 +515,11 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) ...@@ -518,7 +515,11 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
if (IS_ERR(cxlm)) if (IS_ERR(cxlm))
return PTR_ERR(cxlm); return PTR_ERR(cxlm);
rc = cxl_pci_setup_regs(cxlm); rc = cxl_setup_regs(pdev, CXL_REGLOC_RBI_MEMDEV, &map);
if (rc)
return rc;
rc = cxl_map_regs(cxlm, &map);
if (rc) if (rc)
return rc; return rc;
......
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