提交 81b76232 编写于 作者: C Claudiu Beznea 提交者: sanglipeng

ARM: dts: at91: sam9x60: fix the ddr clock for sam9x60

stable inclusion
from stable-v5.10.166
commit aa8b584cec01e2a7245f27d53d36ad287df71436
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I7TH9O

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=aa8b584cec01e2a7245f27d53d36ad287df71436

--------------------------------

[ Upstream commit 9bfa2544 ]

The 2nd DDR clock for sam9x60 DDR controller is peripheral clock with
id 49.

Fixes: 1e5f532c ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208115241.36312-1-claudiu.beznea@microchip.comSigned-off-by: NSasha Levin <sashal@kernel.org>
Signed-off-by: Nsanglipeng <sanglipeng1@jd.com>
上级 22e4f98b
...@@ -567,7 +567,7 @@ ...@@ -567,7 +567,7 @@
mpddrc: mpddrc@ffffe800 { mpddrc: mpddrc@ffffe800 {
compatible = "microchip,sam9x60-ddramc", "atmel,sama5d3-ddramc"; compatible = "microchip,sam9x60-ddramc", "atmel,sama5d3-ddramc";
reg = <0xffffe800 0x200>; reg = <0xffffe800 0x200>;
clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>; clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>;
clock-names = "ddrck", "mpddr"; clock-names = "ddrck", "mpddr";
}; };
......
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