diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index fffad2426ee4bc0ea1689b0de9e760db41713a0f..3b33f0bb78ae4bd9da4f1b1c810cdd3f740a75ba 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -2,7 +2,6 @@ asflags-y += -march=armv7-a obj-y += io.o obj-y += irq.o -obj-y += flowctrl.o obj-y += pm.o obj-y += reset.o obj-y += reset-handler.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index afcee04f2616aa5c8c1e443b2feaa4f3465c1fea..76e4c83cd5c8dd54e1f644618beef62087e0b0b2 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -26,12 +26,13 @@ #include #include +#include + #include #include #include #include "cpuidle.h" -#include "flowctrl.h" #include "iomap.h" #include "irq.h" #include "pm.h" diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 75620ae73913a18d92fd4521b7ae06aea397e1e1..b5a2afe99101f9008a34510a9bf3dbd17e2d5cf1 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -21,6 +21,7 @@ #include #include +#include #include #include @@ -30,7 +31,6 @@ #include #include "common.h" -#include "flowctrl.h" #include "iomap.h" #include "reset.h" diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index b0f48a3946fae27277dd8ca49f9432896e89cfb0..1ad5719779b00ab1fa4ea5d6a1c2d944e5b7e0f0 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -27,6 +27,7 @@ #include #include +#include #include #include #include @@ -38,7 +39,6 @@ #include #include -#include "flowctrl.h" #include "iomap.h" #include "pm.h" #include "reset.h" diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index e3070fdab80b8b7481c0527e2d649ae7d664dc58..805f306fa6f707f055878a31f00a2f412a89f9c5 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -17,12 +17,12 @@ #include #include +#include #include #include #include -#include "flowctrl.h" #include "iomap.h" #include "reset.h" #include "sleep.h" diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S index f5d19667484edd38e65bb1aa1d1a4413a036bfbf..5c8e638ee51a3b590cc8274a3edb22e5a93dd996 100644 --- a/arch/arm/mach-tegra/sleep-tegra20.S +++ b/arch/arm/mach-tegra/sleep-tegra20.S @@ -20,6 +20,8 @@ #include +#include + #include #include #include @@ -27,7 +29,6 @@ #include "irammap.h" #include "sleep.h" -#include "flowctrl.h" #define EMC_CFG 0xc #define EMC_ADR_CFG 0x10 diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index 16e5ff03383cad5b709eb42b24340b033f86a2c7..dd4a67dabd91692dffae18fd07245c372770840f 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -16,13 +16,13 @@ #include +#include #include #include #include #include -#include "flowctrl.h" #include "irammap.h" #include "sleep.h" diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index e01cbca196b544f57e95ffb1e21e831b93adec03..649e9e8c7bccdf2e566ec0ad05c52c8a85a4fc04 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -48,7 +48,6 @@ #include "board.h" #include "common.h" #include "cpuidle.h" -#include "flowctrl.h" #include "iomap.h" #include "irq.h" #include "pm.h" @@ -75,7 +74,6 @@ static void __init tegra_init_early(void) { of_register_trusted_foundations(); tegra_cpu_reset_handler_init(); - tegra_flowctrl_init(); } static void __init tegra_dt_init_irq(void) diff --git a/drivers/soc/tegra/Kconfig b/drivers/soc/tegra/Kconfig index 208d6edb3fdb8b69c27030de71649783fad18512..c7e8ddfb574e7068a3a27ce14e040b4cdd85086c 100644 --- a/drivers/soc/tegra/Kconfig +++ b/drivers/soc/tegra/Kconfig @@ -12,6 +12,7 @@ config ARCH_TEGRA_2x_SOC select PINCTRL_TEGRA20 select PL310_ERRATA_727915 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0 + select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC select TEGRA_TIMER help @@ -24,6 +25,7 @@ config ARCH_TEGRA_3x_SOC select ARM_ERRATA_764369 if SMP select PINCTRL_TEGRA30 select PL310_ERRATA_769419 if CACHE_L2X0 + select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC select TEGRA_TIMER help @@ -35,6 +37,7 @@ config ARCH_TEGRA_114_SOC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER select PINCTRL_TEGRA114 + select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC select TEGRA_TIMER help @@ -45,6 +48,7 @@ config ARCH_TEGRA_124_SOC bool "Enable support for Tegra124 family" select HAVE_ARM_ARCH_TIMER select PINCTRL_TEGRA124 + select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC select TEGRA_TIMER help @@ -101,6 +105,9 @@ config ARCH_TEGRA_186_SOC endif endif +config SOC_TEGRA_FLOWCTRL + bool + config SOC_TEGRA_PMC bool diff --git a/drivers/soc/tegra/Makefile b/drivers/soc/tegra/Makefile index b4425e4319ffc96c6432e06db51cce799b52f62f..4f81dd55e5d1c46443724ef34e90d03e9d15796c 100644 --- a/drivers/soc/tegra/Makefile +++ b/drivers/soc/tegra/Makefile @@ -1,5 +1,6 @@ obj-y += fuse/ obj-y += common.o +obj-$(CONFIG_SOC_TEGRA_FLOWCTRL) += flowctrl.o obj-$(CONFIG_SOC_TEGRA_PMC) += pmc.o obj-$(CONFIG_SOC_TEGRA_PMC_TEGRA186) += pmc-tegra186.o diff --git a/arch/arm/mach-tegra/flowctrl.c b/drivers/soc/tegra/flowctrl.c similarity index 89% rename from arch/arm/mach-tegra/flowctrl.c rename to drivers/soc/tegra/flowctrl.c index 475e783992fd284dbeb613ba8928262811c1809a..3a5a1cb9ae9042e26ac3a429431ab52128d70e94 100644 --- a/arch/arm/mach-tegra/flowctrl.c +++ b/drivers/soc/tegra/flowctrl.c @@ -1,7 +1,7 @@ /* - * arch/arm/mach-tegra/flowctrl.c + * drivers/soc/tegra/flowctrl.c * - * functions and macros to control the flowcontroller + * Functions and macros to control the flowcontroller * * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved. * @@ -25,10 +25,10 @@ #include #include +#include +#include #include -#include "flowctrl.h" - static u8 flowctrl_offset_halt_cpu[] = { FLOW_CTRL_HALT_CPU0_EVENTS, FLOW_CTRL_HALT_CPU1_EVENTS, @@ -47,6 +47,10 @@ static void __iomem *tegra_flowctrl_base; static void flowctrl_update(u8 offset, u32 value) { + if (WARN_ONCE(!tegra_flowctrl_base, + "Tegra flowctrl not initialised!\n")) + return; + writel(value, tegra_flowctrl_base + offset); /* ensure the update has reached the flow controller */ @@ -58,6 +62,10 @@ u32 flowctrl_read_cpu_csr(unsigned int cpuid) { u8 offset = flowctrl_offset_cpu_csr[cpuid]; + if (WARN_ONCE(!tegra_flowctrl_base, + "Tegra flowctrl not initialised!\n")) + return 0; + return readl(tegra_flowctrl_base + offset); } @@ -148,13 +156,16 @@ static const struct of_device_id matches[] __initconst = { { } }; -void __init tegra_flowctrl_init(void) +static int __init tegra_flowctrl_init(void) { /* hardcoded fallback if device tree node is missing */ unsigned long base = 0x60007000; unsigned long size = SZ_4K; struct device_node *np; + if (!soc_is_tegra()) + return 0; + np = of_find_matching_node(NULL, matches); if (np) { struct resource res; @@ -168,4 +179,9 @@ void __init tegra_flowctrl_init(void) } tegra_flowctrl_base = ioremap_nocache(base, size); + if (!tegra_flowctrl_base) + return -ENXIO; + + return 0; } +early_initcall(tegra_flowctrl_init); diff --git a/arch/arm/mach-tegra/flowctrl.h b/include/soc/tegra/flowctrl.h similarity index 77% rename from arch/arm/mach-tegra/flowctrl.h rename to include/soc/tegra/flowctrl.h index 73a9c5016c1ab1ae9414887eb3fdfa16a1b32293..8f86aea4024b2f41ad9f28b9cbf39d397940dbac 100644 --- a/arch/arm/mach-tegra/flowctrl.h +++ b/include/soc/tegra/flowctrl.h @@ -1,7 +1,5 @@ /* - * arch/arm/mach-tegra/flowctrl.h - * - * functions and macros to control the flowcontroller + * Functions and macros to control the flowcontroller * * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved. * @@ -18,8 +16,8 @@ * along with this program. If not, see . */ -#ifndef __MACH_TEGRA_FLOWCTRL_H -#define __MACH_TEGRA_FLOWCTRL_H +#ifndef __SOC_TEGRA_FLOWCTRL_H__ +#define __SOC_TEGRA_FLOWCTRL_H__ #define FLOW_CTRL_HALT_CPU0_EVENTS 0x0 #define FLOW_CTRL_WAITEVENT (2 << 29) @@ -53,14 +51,32 @@ #define TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP (0xF << 8) #ifndef __ASSEMBLY__ +#ifdef CONFIG_SOC_TEGRA_FLOWCTRL u32 flowctrl_read_cpu_csr(unsigned int cpuid); void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value); void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value); void flowctrl_cpu_suspend_enter(unsigned int cpuid); void flowctrl_cpu_suspend_exit(unsigned int cpuid); +#else +static inline u32 flowctrl_read_cpu_csr(unsigned int cpuid) +{ + return 0; +} + +static inline void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value) +{ +} + +static inline void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value) {} -void tegra_flowctrl_init(void); -#endif +static inline void flowctrl_cpu_suspend_enter(unsigned int cpuid) +{ +} -#endif +static inline void flowctrl_cpu_suspend_exit(unsigned int cpuid) +{ +} +#endif /* CONFIG_SOC_TEGRA_FLOWCTRL */ +#endif /* __ASSEMBLY */ +#endif /* __SOC_TEGRA_FLOWCTRL_H__ */