From 7a9fe891747c695afd6ddabe60a09a578decac44 Mon Sep 17 00:00:00 2001
From: leoliu-oc <leoliu-oc@zhaoxin.com>
Date: Wed, 10 May 2023 20:21:07 +0800
Subject: [PATCH] openeuler_defconfig: Add configuration items for zhaoxin

zhaoxin inclusion
category: other
bugzilla: https://gitee.com/openeuler/kernel/issues/I722EJ
CVE: NA

----------------------------------------------------------------

Set the default configuration for the Zhaoxin CPUs.

Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
---
 arch/x86/configs/openeuler_defconfig | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/x86/configs/openeuler_defconfig b/arch/x86/configs/openeuler_defconfig
index 1de117ae0932..b089fee914fb 100644
--- a/arch/x86/configs/openeuler_defconfig
+++ b/arch/x86/configs/openeuler_defconfig
@@ -324,6 +324,7 @@ CONFIG_X86_DEBUGCTLMSR=y
 CONFIG_CPU_SUP_INTEL=y
 CONFIG_CPU_SUP_AMD=y
 CONFIG_CPU_SUP_CENTAUR=y
+CONFIG_CPU_SUP_ZHAOXIN=y
 CONFIG_HPET_TIMER=y
 CONFIG_HPET_EMULATE_RTC=y
 CONFIG_DMI=y
@@ -2270,6 +2271,7 @@ CONFIG_ATA_PIIX=m
 # CONFIG_SATA_ULI is not set
 # CONFIG_SATA_VIA is not set
 # CONFIG_SATA_VITESSE is not set
+CONFIG_SATA_ZHAOXIN=m
 
 #
 # PATA SFF controllers with BMDMA
@@ -3375,6 +3377,7 @@ CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_TIMERIOMEM=m
 CONFIG_HW_RANDOM_INTEL=m
 CONFIG_HW_RANDOM_AMD=m
+CONFIG_HW_RANDOM_ZHAOXIN=m
 CONFIG_HW_RANDOM_VIA=m
 CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_NVRAM=y
@@ -3457,6 +3460,7 @@ CONFIG_I2C_NFORCE2_S4985=m
 CONFIG_I2C_SIS96X=m
 CONFIG_I2C_VIA=m
 CONFIG_I2C_VIAPRO=m
+CONFIG_I2C_ZHAOXIN=m
 
 #
 # ACPI drivers
@@ -3825,6 +3829,7 @@ CONFIG_SENSORS_TMP102=m
 CONFIG_SENSORS_TMP401=m
 CONFIG_SENSORS_TMP421=m
 CONFIG_SENSORS_VIA_CPUTEMP=m
+CONFIG_SENSORS_ZHAOXIN_CPUTEMP=m
 CONFIG_SENSORS_VIA686A=m
 CONFIG_SENSORS_VT1211=m
 CONFIG_SENSORS_VT8231=m
@@ -7157,9 +7162,14 @@ CONFIG_CRYPTO_USER_API_RNG=y
 CONFIG_CRYPTO_USER_API_AEAD=y
 CONFIG_CRYPTO_HASH_INFO=y
 CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_ZHAOXIN_SM3=m
+CONFIG_CRYPTO_DEV_ZHAOXIN_SM4=m
 CONFIG_CRYPTO_DEV_PADLOCK=m
 CONFIG_CRYPTO_DEV_PADLOCK_AES=m
 CONFIG_CRYPTO_DEV_PADLOCK_SHA=m
+CONFIG_CRYPTO_DEV_ZHAOXIN=m
+CONFIG_CRYPTO_DEV_ZHAOXIN_AES=m
+CONFIG_CRYPTO_DEV_ZHAOXIN_SHA=m
 CONFIG_CRYPTO_DEV_CCP=y
 CONFIG_CRYPTO_DEV_CCP_DD=m
 CONFIG_CRYPTO_DEV_SP_CCP=y
-- 
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