arm64: cpufeature: Reduce number of pointer auth CPU caps from 6 to 4

mainline inclusion
from v5.0-rc1
commit a56005d3
category: feature
bugzilla: 27615
CVE: NA

-------------------------------------------------

We can easily avoid defining the two meta-capabilities for the address
and generic keys, so remove them and instead just check both of the
architected and impdef capabilities when determining the level of system
support.
Reviewed-by: NSuzuki Poulose <suzuki.poulose@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

Conflicts:
	arch/arm64/include/asm/cpucaps.h
[Zheng Zengkai: adjust context and fix conflicts caused by skipping
the following commit.
95b861a4 arm64: arch_timer: Add workaround for ARM erratum 1188873
8b2cca9a arm64: KVM: Force VHE for systems affected by erratum 1165522]
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

arch/arm64/include/asm/cpucaps.h

@@ -61,11 +61,9 @@
 #define ARM64_HAS_SB				40
 #define ARM64_HAS_ADDRESS_AUTH_ARCH		41
 #define ARM64_HAS_ADDRESS_AUTH_IMP_DEF		42
-#define ARM64_HAS_ADDRESS_AUTH			43
-#define ARM64_HAS_GENERIC_AUTH_ARCH		44
-#define ARM64_HAS_GENERIC_AUTH_IMP_DEF		45
-#define ARM64_HAS_GENERIC_AUTH			46
+#define ARM64_HAS_GENERIC_AUTH_ARCH		43
+#define ARM64_HAS_GENERIC_AUTH_IMP_DEF		44
 
-#define ARM64_NCAPS				47
+#define ARM64_NCAPS				45
 
 #endif /* __ASM_CPUCAPS_H */

arch/arm64/include/asm/cpufeature.h

@@ -530,13 +530,15 @@ static inline bool system_has_prio_mask_debugging(void)
 static inline bool system_supports_address_auth(void)
 {
 	return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) &&
-		cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH);
+		(cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_ARCH) ||
+		 cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_IMP_DEF));
 }
 
 static inline bool system_supports_generic_auth(void)
 {
 	return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) &&
-		cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH);
+		(cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_ARCH) ||
+		 cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_IMP_DEF));
 }
 
 #define ARM64_SSBD_UNKNOWN		-1

arch/arm64/kernel/cpufeature.c

@@ -1579,6 +1579,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
 		.field_pos = ID_AA64ISAR1_APA_SHIFT,
 		.min_field_value = ID_AA64ISAR1_APA_ARCHITECTED,
 		.matches = has_cpuid_feature,
+		.cpu_enable = cpu_enable_address_auth,
 	},
 	{
 		.desc = "Address authentication (IMP DEF algorithm)",
@@ -1589,11 +1590,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
 		.field_pos = ID_AA64ISAR1_API_SHIFT,
 		.min_field_value = ID_AA64ISAR1_API_IMP_DEF,
 		.matches = has_cpuid_feature,
-	},
-	{
-		.capability = ARM64_HAS_ADDRESS_AUTH,
-		.type = ARM64_CPUCAP_SYSTEM_FEATURE,
-		.matches = has_address_auth,
 		.cpu_enable = cpu_enable_address_auth,
 	},
 	{
@@ -1616,11 +1612,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
 		.min_field_value = ID_AA64ISAR1_GPI_IMP_DEF,
 		.matches = has_cpuid_feature,
 	},
-	{
-		.capability = ARM64_HAS_GENERIC_AUTH,
-		.type = ARM64_CPUCAP_SYSTEM_FEATURE,
-		.matches = has_generic_auth,
-	},
 #endif /* CONFIG_ARM64_PTR_AUTH */
 	{},
 };